SNOSDG7
May 2025
TPS7H6101-SEP
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Device Options Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
7.1
Timing Measurement
7.2
Deadtime Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Gate Drive Input Voltage
8.3.2
Linear Regulator Operation
8.3.3
Bootstrap Operation
8.3.3.1
Bootstrap Charging Methods
8.3.3.2
Bootstrap Capacitor
8.3.3.3
Bootstrap Diode
8.3.3.4
Bootstrap Resistor
8.3.4
High-Side Driver Startup
8.3.5
PWM_LI and EN_HI
8.3.6
Dead Time
8.3.7
Input Interlock Protection
8.3.8
Undervoltage Lockout and Power Good (PGOOD)
8.3.9
Negative SW Voltage Transients
8.3.10
Level Shifter
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Bootstrap and Bypass Capacitor
9.2.2.2
Bootstrap Diode
9.2.3
Application Results
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
12.1
Tape and Reel Information
Data Sheet
TPS7H6101-SEP 200V, 10A GaN Half Bridge Power Stage