SNOSDG7 May   2025 TPS7H6101-SEP

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Timing Measurement
    2. 7.2 Deadtime Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Gate Drive Input Voltage
      2. 8.3.2  Linear Regulator Operation
      3. 8.3.3  Bootstrap Operation
        1. 8.3.3.1 Bootstrap Charging Methods
        2. 8.3.3.2 Bootstrap Capacitor
        3. 8.3.3.3 Bootstrap Diode
        4. 8.3.3.4 Bootstrap Resistor
      4. 8.3.4  High-Side Driver Startup
      5. 8.3.5  PWM_LI and EN_HI
      6. 8.3.6  Dead Time
      7. 8.3.7  Input Interlock Protection
      8. 8.3.8  Undervoltage Lockout and Power Good (PGOOD)
      9. 8.3.9  Negative SW Voltage Transients
      10. 8.3.10 Level Shifter
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bootstrap and Bypass Capacitor
        2. 9.2.2.2 Bootstrap Diode
      3. 9.2.3 Application Results
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

9.2.2.1 Bootstrap and Bypass Capacitor

The external bootstrap capacitor needs to maintain operation above the BOOT UVLO falling threshold during normal operation. As a best design practice, size the capacitor to allow for substantial margin this threshold. The first step in determining the bootstrap capacitor value is calculating for ∆VBOOT. This is the maximum allowable drop on the bootstrap capacitor:

Equation 10. ∆ V B O O T ≈ V I N - n × V F - V B O O T _ U V L O   = 12 V - 1 × 0.9 V - 6.65 V = 4.35 V

where:

  • n is the number of bootstrap diodes used in series
  • VF is the voltage drop of the bootstrap diode chosen
  • VBOOT_UVLO is the BOOT UVLO falling threshold voltage

To maintain significant margin and account for any additional voltage drop across the bootstrap resistor used and also for load transients, the capacitor is calculated for ∆VBOOT of 1.5V. Referring to the Bootstrap Capacitor section, the value of Qtotal needs to first be determined, and then CBOOT can subsequently be calculated:

Equation 11. Q t o t a l = Q g + I Q B G × D M A X f S W + I Q H S f S W = 5 n C + 50 μ A   ×   0.28 100 k H z + 5 m A 100 k H z = 55 n C
Equation 12. C B O O T ≥ Q t o t a l ∆ V B O O T =   55 n C 1.5 V = 36.7 n F

A minimum value of 36.7nF is needed for the design. However, given the potential for capacitance changes with temperature and applied voltage, as well as unexpected circuit behavior such as load transients that impact the bootstrap charging time, a 100nF X7R capacitor is selected.

The VIN capacitor selected must be larger than the bootstrap capacitor. The general recommendation is that this capacitor is at least ten times the bootstrap capacitor value, which gives 1μF capacitor in this instance. For the evaluation setup, three 3.3μF and nine 100μF capacitors were used at VIN, both ceramic X7R type capacitors. The recommendation is to place these capacitors and the bootstrap capacitors as close the respective pins as possible. Select capacitors with voltage ratings that are sufficiently larger than the maximum applied voltage (i.e. greater than two times if possible).

Lastly, as detailed in Linear Regulator Operation section, select high-quality 1μF X7R ceramic capacitors for use at BP5H, BP5L, and BP7L outputs. Place these capacitors in close proximity to the respective pins.