SNOSDJ7A February   2025  – December 2025 LMG3650R025

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Switching Parameters
      1. 6.1.1 Turn-On Times
      2. 6.1.2 Turn-Off Times
      3. 6.1.3 Drain-Source Turn-On and Turn-off Slew Rate
      4. 6.1.4 Zero-Voltage Detection Times (LMG3656R025 only)
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
      1. 7.2.1 LMG3650R025 Functional Block Diagram
      2. 7.2.2 LMG3651R025 Functional Block Diagram
      3. 7.2.3 LMG3656R025 Functional Block Diagram
      4. 7.2.4 LMG3657R025 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Drive Strength Adjustment
      2. 7.3.2 GaN Power FET Switching Capability
      3. 7.3.3 VDD Supply
      4. 7.3.4 Overcurrent and Short-Circuit Protection
      5. 7.3.5 Overtemperature Protection
      6. 7.3.6 UVLO Protection
      7. 7.3.7 Fault Reporting
      8. 7.3.8 Auxiliary LDO (LMG3651R025 Only)
      9. 7.3.9 Zero-Voltage Detection (ZVD) (LMG3656R025 Only)
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Slew Rate Selection
        2. 8.2.1.2 Signal Level-Shifting
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Using an Isolated Power Supply
      2. 8.3.2 Using a Bootstrap Diode
        1. 8.3.2.1 Diode Selection
        2. 8.3.2.2 Managing the Bootstrap Voltage
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Solder-Joint Reliability
        2. 8.4.1.2 Power-Loop Inductance
        3. 8.4.1.3 Signal-Ground Connection
        4. 8.4.1.4 Bypass Capacitors
        5. 8.4.1.5 Switch-Node Capacitance
        6. 8.4.1.6 Signal Integrity
        7. 8.4.1.7 High-Voltage Spacing
        8. 8.4.1.8 Thermal Recommendations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1.     PACKAGE OPTION ADDENDUM
    2. 11.1 Tape and Reel Information
    3.     70

5.1 Absolute Maximum Ratings

Unless otherwise noted: voltages are respect to GND/SRC(1)
MIN MAX UNIT
VDS Drain-source voltage, FET off 650 V
VDS(surge) Drain-source voltage, surge condition, FET off 720 V
VDS(tr)(surge) Drain-source transient ringing peak voltage, surge condition, FET off 800 V
Pin voltage VDD -0.5 26 V
IN -5(2) 28 V
FLT/RDRV, ZVD (LMG3656 only), ZCD (LMG3657 only) -0.5 5.5 V
LDO5V (LMG3651 only) 5.5 V
ID(cnts) Drain (DRN to SRC) continuous current, FET on. Tj = 25℃(2) -60 60 A
ID(cnts) Drain (DRN to SRC) continuous current, FET on. Tj = 150℃(2) -48.5 48.5 A
ID(pulse) Pulse drain current, FET on, tp < 10µs. Tj = 25℃(3) -85 85 A
IS(cnts) Source (SRC to DRN) continuous current, FET off. Tj = 25℃ 60 A
IS(cnts) Source (SRC to DRN) continuous current, FET off. Tj = 150℃ 48.5 A
TJ Operating junction temperature(4) –40 175 °C
Tstg Storage temperature –65 150 °C
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) The IN pin voltage is limited to a minimum of -0.5V in steady state, with a transient tolerance of -5V for duration <1µs.
(3) Absolute maximum ratings are limited by device internal overcurrent protection feature. However, the FET drain intrinsic positive pulsed current rating for tp < 10µs varies with junction temperature; 81A typ. at 150℃. The positive pulsed current must remain below the overcurrent threshold to avoid the FET being automatically shut off.
(4) Refer to the Electrical and Switching Characteristics Tables for junction temperature test conditions.