SPRABJ8D September   2022  – May 2025 AM2612 , AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P2 , AM263P2-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Power
    1. 2.1 Discrete DC-DC Power Solution
    2. 2.2 Integrated PMIC Power Solution
    3. 2.3 Power Decoupling and Filtering
      1. 2.3.1 ADC/DAC Voltage Reference Decoupling
    4. 2.4 Estimated Power Consumption
    5. 2.5 Power Distribution Network
      1. 2.5.1 Simulations
        1. 2.5.1.1 Core Digital Power 1.2V
        2. 2.5.1.2 Digital and Analog I/O Power 3.3V
    6. 2.6 eFuse Power
  6. 3 Clocking
    1. 3.1 Crystal and Oscillator Input Options
    2. 3.2 Output Clock Generation
    3. 3.3 Crystal Selection and Shunt Capacitance
    4. 3.4 Crystal Placement and Routing
  7. 4 Resets
  8. 5 Bootstrapping
    1. 5.1 SOP Signal Implementation
  9. 6 OSPI and QSPI Memory Implementation
    1. 6.1 ROM OSPI and QSPI Boot Requirements
      1. 6.1.1 AM263x QSPI Boot Pin Requirements
      2. 6.1.2 AM263Px OSPI and QSPI Boot Pin Requirements
      3. 6.1.3 AM261x OSPI and QSPI Boot Pin Requirements
    2. 6.2 Additional OSPI and QSPI References
  10. 7 Debug Interfaces
    1. 7.1 JTAG Emulators and Trace
    2. 7.2 UART
  11. 8 USB
    1. 8.1 USB Device Mode
    2. 8.2 USB Host Mode
  12. 9 Multiplexed Peripherals
  13. 10Digital Peripherals
    1. 10.1 General Digital Peripheral Routing Guidelines
    2. 10.2 Trace Length Matching
  14. 11Analog Peripherals
    1. 11.1 General Analog Peripheral Routing Guidelines
      1. 11.1.1 Resolver ADC Routing Guidelines
  15. 12Layer Stackup
    1. 12.1 Key Stackup Features
  16. 13Vias
  17. 14BGA Power Fan-Out and Decoupling Placement
    1. 14.1 Ground Return
      1. 14.1.1 Ground Return - ZCZ Package AM26x Devices
      2. 14.1.2 Ground Return - ZNC and ZFG Package AM261x Devices
    2. 14.2 1.2V Core Digital Power
      1. 14.2.1 1.2V Core Digital Power Key Layout Considerations - ZCZ
      2. 14.2.2 1.2V Core Digital Power Key Layout Considerations - ZFG
    3. 14.3 3.3V Digital and Analog Power
      1. 14.3.1 3.3V I/O Power Key Layout Considerations - ZCZ
      2. 14.3.2 3.3V I/O Power Key Layout Considerations - ZFG
    4. 14.4 1.8V Digital and Analog Power
      1. 14.4.1 1.8V Key Layout Considerations - ZCZ
      2. 14.4.2 1.8V Key Layout Considerations - ZFG
  18. 15Summary
  19. 16References
  20. 17Revision History

2.6 eFuse Power

The AM26x MCUs have a one-time programmable eFuse memory that can be utilized for storing customer cryptographic keys and other information specific to individual devices. These e-Fuse memory locations can only be programmed when the target device eFuse power pin (VPP), is powered by a 1.7V nominal output voltage, 100mA peak current supply. This 1.7V VPP power supply can be on-board, off-board or sourced from the AM26x devices' internal 1.8V LDO, re-programmed to the required 1.7V/100mA supply.

The eFuse programming typically follows one or both of the following scenarios:

  • Factory programming – eFuse memory programmed during post assembly test of the AM26x system.
  • Field programming – eFuse memory is programmed after the device has left the factory and is installed in the end-equipment.

If the factory programming scenario is required for a product, then implementing the VPP power supply off-board reduces the number of components required to be placed on the PCB assembly. The VPP supply is only be used during this programming sequence, so keeping this hardware on the board is not an efficient use of PCB floor plan area, BOM cost, or test time.

However, if the eFuse memory must be programmed outside the factory environment, the VPP power must either be supplied from an onboard component or from an attached accessory board that can supply this power as needed.

External VPP Supply

The specific placement of the VPP supply and implementation depend on how the eFuse memory is utilized by the designer. The implementation must follow the diagram shown in Figure 2-19

AM26x eFuse VPP - External Power Supply Implementation Figure 2-19 AM26x eFuse VPP - External Power Supply Implementation

On the AM263x controlCARD design, the VPP supply is populated on the board to enable convenient eFuse programming for customers experimenting with this process. On the controlCARD, the TLV75801PDRVR LDO (U66) is used to drop down the 3.3V system I/O voltage to the VPP 1.7V.

On-Chip VPP Supply

The AM263Px and AM261x MCUs have the option to source VPP internally using the 1.8V Analog LDO (ANALDO). The ANALDO must be overwritten to provide 1.7V during eFuse programming, then reverted back to normal operation.

AM263Px/AM261x eFuse VPP - Internal Analog LDO Implementation Figure 2-20 AM263Px/AM261x eFuse VPP - Internal Analog LDO Implementation

For the full VPP electrical requirements and eFuse programming sequence, see the VPP Specifications for One-Time Programmable (OTP) eFuses section in the device-specific AM26x Technical Reference Manual.