The following general routing recommendations need to be followed throughout an AM26x PCB design. The 45nm LVCMOS process I/O can produce relatively fast edge-rates. Without transmission-line effects planned for, this can result in severe overshoot or undershoot even with relatively short traces on the PCB. These uncontrolled level transitions can damage associated components by presenting attached I/O with over/under-voltage conditions. Additionally, these uncontrolled transitions can radiate excessively which creates cross-talk and EMI compliance problems.

To mitigate these problems:

• Route all digital I/O as controlled impedance transmission-lines (microstrip or stripline).
• Place series termination near each AM26x transmit pin and attached transmit pins of associated IC.
  • The values and performance of these termination resistors need to be validated during wake-up of new PCB hardware.
  • In some cases, these termination resistors are not required, but need to only be removed or eliminated from the design after testing. 0Ω resistors can aid in creating footprints where termination resistors are needed.
• Route with solid ground return planes on adjacent layers.
• Route with ground return rings surrounding constantly switching signals (clocks, EPWM).
• Route with ground return rings surrounding sensitive analog signals (ADC/DAC channels, VREF).

For additional guidance on peripheral routing, refer to High-speed Interface Layout Guidelines.