An example highly integrated ADAS system based on dual TDA4VM SoCs is shown in Figure 1. This ADAS system integrates front-camera, 4 surround view cameras and 4 side view cameras on a single PCB and supports below main features:

• Cameras are connected via MIPI CSI2-RX interface
  • Each CSI2-RX port supports 4 lane and data rates up to 2.5Gbps per lane, totaling up to 10 Gbps per CSI2-RX port.
• Each TDA4x SOC needs a dedicated power (PMIC) solution, however secondary TDA4x PMIC can be connected to primary TDA4x to achieve wake up function.
• The front camera systems typically require high-resolution sensors to achieve complex functions such as object detection, parking assist and so on. In such scenario, multiple deep learning models need to work together. The original camera data can be duplicated to two TDA4x separately through de-serializers such as FPDLink.
• The four side view cameras and four surround view cameras can be deployed on two TDA4x separately to balance functionality, processing load, power and thermal distribution.
  Figure 2-1 Typical Dual TDA4 Cascading System Diagram
• Two TDA4x SoCs can be connected via various high-speed interfaces including PCIe and Ethernet. The PCIe, Ethernet and SPI interconnection between the two TDA4x SoCs does not require the PHY chips, the pins can be directly connected through PCB. For example, the Ethernet switch (CPSW9G) interconnection between two TDA4x SoCs, or CPSW9G and CPSW2G interconnection in the same chip, are using MAC to MAC support without Ethernet PHY.
  • The PCIe controller supports Gen3, 8 Gbps for each lane and up to 4 lanes per PCIe controller, providing total 32Gbps throughput.
  • The 8-port Ethernet switch supports:
    • All ports support 2.5Gb HSGMII, 1GB SGMII/RGMII
    • Two ports supporting 5Gb/10Gb XFI/USXGMII
• The external DDR memory and flash memories such as eMMC, OSPI/QSPI are required for each TDA4 to achieve the best performance. However, in some scenarios, further optimizations are possible to balance cost and system design.