In this case, only one boot flash for
primary TDA4 is used, as shown in Figure 4-2. The
advantage of this boot sequence is lower system cost, and the disadvantage is longer
system boot time because the secondary TDA4x SoC is dependent on the primary TDA4x
SoC to start booting.
Figure 4-2 Boot Flow With First flash
Only
Key features and process as below:
The primary TDA4x SoC uses
OSPI/QSPI boot mode, meanwhile the secondary TDA4x SoC boots using
SPI/USB/Eth/PCIe mod depending on hardware support.
Primary TDA4x SoC will boot from
its own OSPI, then wakeup the secondary TDA4x PMIC via I2C connection, then
initialize and configure the hardware interface which used to boot secondary
TDA4x SoC. In parallel, it will load the boot images for other cores (except
A72) from EMMC to DDR.
After PMIC is enabled, secondary
TDA4x SoC will first receive boot image from primary TDA4x SoC and starts to
boot. After that, it loads all of the core images from EMMC to DDR to boot the
whole system.
After both TDA4x SoC boots are
completed, subsequent data transfer can happen via Ethernet/PCIe.