SPRUJ66B February   2023  – September 2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Key Features
        1. 1.3.1.1 Processor
        2. 1.3.1.2 Memory
        3. 1.3.1.3 JTAG Emulator
        4. 1.3.1.4 Supported Interfaces and Peripherals
        5. 1.3.1.5 Expansion Connectors Headers to Support Application Specific Add On Boards
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 EVM Revisions and Assembly Variants
    2. 2.2 System Description
      1. 2.2.1 Board Image With Markings
      2. 2.2.2 Functional Block Diagram
      3. 2.2.3 AM62A Low Power SK EVM Interface Mapping
      4. 2.2.4 Power ON/OFF Procedures
        1. 2.2.4.1 Power-On Procedure
        2. 2.2.4.2 Power-Off Procedure
        3. 2.2.4.3 Power Test Points
      5. 2.2.5 Peripheral and Major Component Description
        1. 2.2.5.1  Clocking
          1. 2.2.5.1.1 Peripheral Ref Clock
        2. 2.2.5.2  Reset
        3. 2.2.5.3  CSI Interface
        4. 2.2.5.4  Audio Codec Interface
        5. 2.2.5.5  HDMI Display Interface
        6. 2.2.5.6  JTAG Interface
        7. 2.2.5.7  Test Automation Header
        8. 2.2.5.8  UART Interface
        9. 2.2.5.9  USB Interface
          1. 2.2.5.9.1 USB 2 0 Type A Interface
          2. 2.2.5.9.2 USB 2 0 Type C Interface
        10. 2.2.5.10 Memory Interfaces
          1. 2.2.5.10.1 LPDDR4 Interface
          2. 2.2.5.10.2 Octal Serial Peripheral Interface (OSPI)
          3. 2.2.5.10.3 MMC Interfaces
            1. 2.2.5.10.3.1 MMC0 - eMMC Interface
            2. 2.2.5.10.3.2 MMC1 - Micro SD Interface
            3. 2.2.5.10.3.3 MMC2 - M.2 Key E Interface
          4. 2.2.5.10.4 Board ID EEPROM
        11. 2.2.5.11 Ethernet Interface
          1. 2.2.5.11.1 CPSW Ethernet PHY Default Configuration
        12. 2.2.5.12 GPIO Port Expander
        13. 2.2.5.13 GPIO Mapping
        14. 2.2.5.14 Power
          1. 2.2.5.14.1 Power Requirements
          2. 2.2.5.14.2 Power Input
          3. 2.2.5.14.3 Power Supply
          4. 2.2.5.14.4 AM62A SoC Power
          5. 2.2.5.14.5 Current Monitoring
        15. 2.2.5.15 AM62A Low Power SK EVM User Setup and Configuration
          1. 2.2.5.15.1 Boot Modes
          2. 2.2.5.15.2 User Test LEDs
        16. 2.2.5.16 Expansion Headers
          1. 2.2.5.16.1 User Expansion Connector
          2. 2.2.5.16.2 MCU Connector
        17. 2.2.5.17 I2C Address Mapping
  9. 3Hardware Design Files
    1. 3.1 Schematics, PCB Layout and BOM
  10. 4Additional Information
    1. 4.1 Known Hardware or Software Issues
    2. 4.2 EMC, EMI, and ESD Compliance
    3. 4.3 Trademarks
    4.     72
  11. 5Revision History

2.2.5.3 CSI Interface

The CSI-2 signals from the AM62A SOC can be connected to a 22 pin FFC connector to interface a CSI-2 standard Camera Card/Module or to a MIPI Connector for FPD Link interface through a 12 Bit Mux/Demux. The FFC and the MIPI connector shares some common auxiliary inputs from the IO Expander.

SK-AM62A-LP CSI Interface Block Diagram Figure 2-13 CSI Interface Block Diagram

Table 2-5 contains 40 pin Camera MIPI connector pin-out.

Table 2-5 CSI Camera Connector (J1) Pinout
Pin No Pin Description Pin No Pin Description
1 NC 21 CSI0_MIPI_RXP3
2 CSI_MIPI_I2C2_SCL 22 CSI_MIPI_GPIO4
3 NC 23 CSI0_MIPI_RXN3
4 CSI_MIPI_I2C2_SDA 24 Ground
5 CSI0_MIPI_RXCLKP 25 NC
6 CSI_MIPI_GPIO0 26 NC
7 CSI0_MIPI_RXCLKN 27 NC
8 CSI_MIPI_GPIO1 28 NC
9 CSI0_MIPI_RXP0 29 NC
10 CSI_REFCLK 30 VCC_3V3_SYS
11 CSI0_MIPI_RXN0 31 NC
12 Ground 32 VCC_3V3_SYS
13 CSI0_MIPI_RXP1 33 NC
14 CSI_MIPI_RSTz 34 VCC_3V3_SYS
15 CSI0_MIPI_RXN1 35 NC
16 Ground 36 VCC_3V3_SYS
17 CSI0_MIPI_RXP2 37 NC
18 CSI_MIPI_GPIO2 38 VCC_CSI_IO
19 CSI0_MIPI_RXN2 39 NC
20 CSI_MIPI_GPIO3 40 VCC_CSI_IO