Product details


Function Equalizer Protocols CML Number of transmitters 1 Number of receivers 1 Supply voltage (V) 2.5, 3.3 Signaling rate (Mbps) 3200 Input signal LVDS, LVPECL, CML Output signal CML Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other LVDS, M-LVDS & PECL ICs

Package | Pins | Size

WSON (NHK) 14 12 mm² 4 x 3 open-in-new Find other LVDS, M-LVDS & PECL ICs


  • Equalizes Up to 14 dB loss at 3.2 Gbps
  • 8 levels of Programmable Equalization
  • Operates up to 3.2 Gbps with 40” FR4 Traces
  • 0.12 UI Residual Deterministic Jitter at 3.2 Gbps with 40” FR4 Traces
  • Single 2.5V or 3.3V Power Supply
  • Supports AC or DC-Coupling with Wide Input Common-Mode
  • Low power Consumption: 100 mW Typ at 2.5V
  • Small 3 mm x 4 mm 14-pin WSON Package
  • > 8 kV HBM ESD Rating
  • -40 to 85°C Operating Temperature Range

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The DS32EV100 programmable equalizer provides compensation for transmission medium losses and reduces the medium-induced deterministic jitter for NRZ data channel. The DS32EV100 is optimized for operation up to 3.2 Gbps for both cables and FR4 traces. The equalizer channel has eight levels of input equalization that can be programmed by three control pins.

The equalizer supports both AC and DC-coupled data paths for long run length data patterns such as PRBS-31, and balanced codes such as 8b/10b. The device uses differential current-mode logic (CML) inputs and outputs. The DS32EV100 is available in a 3 mm x 4 mm 14-pin WSON package. Power is supplied from either a 2.5V or 3.3V supply.

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Technical documentation

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Type Title Date
* Datasheet DS32EV100 Programmable Single Equalizer datasheet (Rev. D) Feb. 19, 2013
User guides DS32EV100-EVK User Guide DS32EV100 Programmable Equalizer Feb. 20, 2012

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