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Product details

Parameters

Function Buffer Protocols LVDS, LVPECL, CML Number of transmitters 4 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 1500 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other LVDS, M-LVDS & PECL ICs

Package | Pins | Size

TQFP (PFB) 48 81 mm² 9 x 9 open-in-new Find other LVDS, M-LVDS & PECL ICs

Features

  • 1.5 Gbps data rate per channel
  • Configurable pre-emphasis drives lossy backplanes and cables
  • Low output skew and jitter
  • LVDS/CML/LVPECL compatible input, LVDS output
  • On-chip 100Ω input and output termination
  • 12 kV ESD protection on LVDS outputs
  • Single 3.3V supply
  • Very low power consumption
  • Industrial -40 to +85°C temperature range
  • Small TQFP Package Footprint
  • Evaluation Kit Available
  • See SCAN90004 for JTAG-enabled version

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Description

The DS90LV004 is a four channel 1.5 Gbps LVDS buffer/repeater. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while configurable pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs interface to LVDS, and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs and outputs are internally terminated with a 100Ω resistor to improve performance and minimize board space. The repeater function is especially useful for boosting signals for longer distance transmission over lossy cables and backplanes.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 4
Type Title Date
* Datasheet DS90LV004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis datasheet (Rev. P) Apr. 17, 2013
Application note Signaling Rate vs. Distance for Differential Buffers Jan. 26, 2010
White paper Overcoming Impedance Discontins in HS Signal Paths Using LVDS Sgnl Cnditionrs May 01, 2006
Application note LVDS Signal Quality: Jitter Measurements Using Eye Patterns Test Report #1 Oct. 05, 1998

Design & development

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Design tools & simulation

SIMULATION MODEL Download
SNLM046.ZIP (11 KB) - IBIS Model
SIMULATION TOOL Download
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PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
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SIMULATION TOOL Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)

CAD/CAE symbols

Package Pins Download
TQFP (PFB) 48 View options

Ordering & quality

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