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Product details

Parameters

Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVTTL, LVCMOS Output signal LVDS Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other LVDS, M-LVDS & PECL ICs

Package | Pins | Size

SOIC (D) 16 59 mm² 9.9 x 6 TSSOP (PW) 16 22 mm² 5 x 4.4 open-in-new Find other LVDS, M-LVDS & PECL ICs

Features

  • >400-Mbps (200-MHz) Switching Rates
  • 0.1-ns Typical Differential Skew
  • 0.4-ns Maximum Differential Skew
  • 2-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • ±350-mV Differential Signaling
  • Low Power Dissipation (13-mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Devices
  • Compatible With IEEE 1596.3 SCI LVDS Standard
  • Compatible With TIA/EIA-644 LVDS Standard
  • Industrial Operating Temperature Range
  • Available in SOIC and TSSOP Surface-Mount Packaging
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Description

The DS90LV031A is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV031A accepts low voltage LVTTL or LVCMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE® function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical.

The EN and EN* inputs allow active Low or active High control of the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV031A and companion line receiver (DS90LV032A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 3
Type Title Date
* Datasheet DS90LV031A 3-V LVDS Quad CMOS Differential Line Driver datasheet (Rev. D) Aug. 25, 2016
Application note AN-1110 LVDS Quad Dynamic I CC vs Frequency May 15, 2004
Application note An Overview of LVDS Technology Oct. 05, 1998

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
99
Description
The DS90LV047-48AEVM is an evaluation module (EVM) designed for performance and functional evaluation of Texas Instruments' DS90LV047A 3-V LVDS quad CMOS differential line driver and DS90LV048A 3-V LVDS CMOS differential line receiver. With this kit, users can quickly evaluate the output (...)
Features
  • DS90LV047A:  Converts single-ended LVCMOS to differential LVDS
  • DS90LV048A:  Converts differential LVDS to single-ended LVCMOS
  • Greater than 400-Mbps (200 MHz) switching rates
  • Single-supply operation:  3.3 V

Design tools & simulation

SIMULATION MODEL Download
SNLM020.ZIP (13 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOL Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)

CAD/CAE symbols

Package Pins Download
SOIC (D) 16 View options
TSSOP (PW) 16 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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