3V Quad CMOS Differential Line Driver
Product details
Parameters
Package | Pins | Size
Features
- >400-Mbps (200-MHz) Switching Rates
- 0.1-ns Typical Differential Skew
- 0.4-ns Maximum Differential Skew
- 2-ns Maximum Propagation Delay
- 3.3-V Power Supply Design
- ±350-mV Differential Signaling
- Low Power Dissipation (13-mW at 3.3-V Static)
- Interoperable With Existing 5-V LVDS Devices
- Compatible With IEEE 1596.3 SCI LVDS Standard
- Compatible With TIA/EIA-644 LVDS Standard
- Industrial Operating Temperature Range
- Available in SOIC and TSSOP Surface-Mount Packaging
Description
The DS90LV031A is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.
The DS90LV031A accepts low voltage LVTTL or LVCMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE® function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical.
The EN and EN* inputs allow active Low or active High control of the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV031A and companion line receiver (DS90LV032A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | DS90LV031A 3-V LVDS Quad CMOS Differential Line Driver datasheet (Rev. D) | Aug. 25, 2016 |
Application note | AN-1110 LVDS Quad Dynamic I CC vs Frequency | May 15, 2004 | |
Application note | An Overview of LVDS Technology | Oct. 05, 1998 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- DS90LV047A: Converts single-ended LVCMOS to differential LVDS
- DS90LV048A: Converts differential LVDS to single-ended LVCMOS
- Greater than 400-Mbps (200 MHz) switching rates
- Single-supply operation: 3.3 V
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SOIC (D) | 16 | View options |
TSSOP (PW) | 16 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.