Product details

Bus voltage (Max) (V) 100 Power switch MOSFET Input VCC (Min) (V) 9 Input VCC (Max) (V) 14 Peak output current (A) 2 Rise time (ns) 10 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 8 Rating Catalog Number of channels (#) 2 Fall time (ns) 10 Prop delay (ns) 35 Iq (uA) 10 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) -1 Driver configuration Dual, Single
Bus voltage (Max) (V) 100 Power switch MOSFET Input VCC (Min) (V) 9 Input VCC (Max) (V) 14 Peak output current (A) 2 Rise time (ns) 10 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 8 Rating Catalog Number of channels (#) 2 Fall time (ns) 10 Prop delay (ns) 35 Iq (uA) 10 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) -1 Driver configuration Dual, Single
SOIC (D) 8 19 mm² 4.9 x 3.9 WSON (DPR) 10 16 mm² 4 x 4
  • Drives Both a High-Side and Low-Side N-Channel MOSFET
  • Adaptive Rising and Falling Edges With Programmable
    Additional Delay
  • Single Input Control
  • Bootstrap Supply Voltage Range up to 118-V DC
  • Fast Turnoff Propagation Delay (25 ns Typical)
  • Drives 1000-pF Loads With 15-ns Rise and Fall Times
  • Supply Rail Undervoltage Lockout
  • SOIC and WSON-10 4-mm × 4-mm Package
  • Drives Both a High-Side and Low-Side N-Channel MOSFET
  • Adaptive Rising and Falling Edges With Programmable
    Additional Delay
  • Single Input Control
  • Bootstrap Supply Voltage Range up to 118-V DC
  • Fast Turnoff Propagation Delay (25 ns Typical)
  • Drives 1000-pF Loads With 15-ns Rise and Fall Times
  • Supply Rail Undervoltage Lockout
  • SOIC and WSON-10 4-mm × 4-mm Package

The LM5104 High-Voltage Gate Driver is designed to drive both the high-side and the low-side N-channel MOSFETs in a synchronous buck configuration. The floating high-side driver can work with supply voltages up to 100 V. The high-side and low-side gate drivers are controlled from a single input. Each change in state is controlled in an adaptive manner to prevent shoot-through issues. In addition to the adaptive transition timing, an additional delay time can be added, proportional to an external setting resistor. An integrated high-voltage diode is provided to charge high-side gate drive bootstrap capacitor. A robust level shifter operates at high speed while consuming low power and providing clean level transitions from the control logic to the high-side gate driver. Undervoltage lockout is provided on both the low-side and the high-side power rails. This device is available in the standard SOIC and the WSON packages.

The LM5104 High-Voltage Gate Driver is designed to drive both the high-side and the low-side N-channel MOSFETs in a synchronous buck configuration. The floating high-side driver can work with supply voltages up to 100 V. The high-side and low-side gate drivers are controlled from a single input. Each change in state is controlled in an adaptive manner to prevent shoot-through issues. In addition to the adaptive transition timing, an additional delay time can be added, proportional to an external setting resistor. An integrated high-voltage diode is provided to charge high-side gate drive bootstrap capacitor. A robust level shifter operates at high speed while consuming low power and providing clean level transitions from the control logic to the high-side gate driver. Undervoltage lockout is provided on both the low-side and the high-side power rails. This device is available in the standard SOIC and the WSON packages.

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Technical documentation

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Type Title Date
* Data sheet LM5104 High-Voltage Half-Bridge Gate Driver With Adaptive Delay datasheet (Rev. D) PDF | HTML 16 Dec 2014
Application note External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Oct 2018
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage 17 Apr 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

LM5104 PSpice Transient Model (Rev. A)

SNVM164A.ZIP (49 KB) - PSpice Model
Simulation model

LM5104 TINA-TI Transient Reference Design

SNVM339.TSC (536 KB) - TINA-TI Reference Design
Simulation model

LM5104 TINA-TI Transient Spice Model

SNVM340.ZIP (10 KB) - TINA-TI Spice Model
Simulation model

LM5104 Unencrypted PSpice Transient Model

SNVMAC6.ZIP (2 KB) - PSpice Model
Calculation tool

LM51xx Schematic Review Template

SNVR521.ZIP (214 KB)
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins Download
SOIC (D) 8 View options
WSON (DPR) 10 View options

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