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LM5109B

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1-A, 100-V half bridge gate driver with 8-V UVLO and high noise immunity

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Data sheet

LM5109B

ACTIVE
Data sheet Order now

Product details

Bus voltage (max) (V) 90 Power switch MOSFET Input VCC (min) (V) 8 Input VCC (max) (V) 14 Peak output current (A) 1 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.025 Fall time (ns) 15 Iq (mA) 0.01 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) -1 Driver configuration Dual, Independent
Bus voltage (max) (V) 90 Power switch MOSFET Input VCC (min) (V) 8 Input VCC (max) (V) 14 Peak output current (A) 1 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.025 Fall time (ns) 15 Iq (mA) 0.01 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) -1 Driver configuration Dual, Independent
SOIC (D) 8 29.4 mm² 4.9 x 6 WSON (NGT) 8 16 mm² 4 x 4
  • Drives Both a High-Side and Low-Side N-Channel MOSFET
  • 1-A Peak Output Current (1.0-A Sink and 1.0-A Source)
  • Inputs Compatible With Independent TTL and CMOS
  • Bootstrap Supply Voltage to 108-V DC
  • Fast Propagation Times (30 ns Typical)
  • Drives 1000-pF Load With 15-ns Rise and Fall Times
  • Excellent Propagation Delay Matching (2 ns Typical)
  • Supply Rail Undervoltage Lockout
  • Low Power Consumption
  • 8-Pin SOIC and Thermally-Enhanced 8-Pin WSON Package
  • Drives Both a High-Side and Low-Side N-Channel MOSFET
  • 1-A Peak Output Current (1.0-A Sink and 1.0-A Source)
  • Inputs Compatible With Independent TTL and CMOS
  • Bootstrap Supply Voltage to 108-V DC
  • Fast Propagation Times (30 ns Typical)
  • Drives 1000-pF Load With 15-ns Rise and Fall Times
  • Excellent Propagation Delay Matching (2 ns Typical)
  • Supply Rail Undervoltage Lockout
  • Low Power Consumption
  • 8-Pin SOIC and Thermally-Enhanced 8-Pin WSON Package

The LM5109B device is a cost-effective, high-voltage gate driver designed to drive both the high-side and the low-side N-channel MOSFETs in a synchronous buck or a half-bridge configuration. The floating high-side driver is capable of working with rail voltages up to 90 V. The outputs are independently controlled with cost-effective TTL and CMOS-compatible input thresholds. The robust level shift technology operates at high speed while consuming low power and providing clean level transitions from the control input logic to the high-side gate driver. Undervoltage lockout is provided on both the low-side and the high-side power rails. The device is available in the 8-pin SOIC and thermally-enhanced 8-pin WSON packages.

The LM5109B device is a cost-effective, high-voltage gate driver designed to drive both the high-side and the low-side N-channel MOSFETs in a synchronous buck or a half-bridge configuration. The floating high-side driver is capable of working with rail voltages up to 90 V. The outputs are independently controlled with cost-effective TTL and CMOS-compatible input thresholds. The robust level shift technology operates at high speed while consuming low power and providing clean level transitions from the control input logic to the high-side gate driver. Undervoltage lockout is provided on both the low-side and the high-side power rails. The device is available in the 8-pin SOIC and thermally-enhanced 8-pin WSON packages.
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LM5102 ACTIVE 2-A, 100-V half bridge gate driver with 8-V UVLO and programmable delay This product adds programmable rising-edge delay with similar current drive specs.
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Technical documentation

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Type Title Date
* Data sheet LM5109B High Voltage 1-A Peak Half-Bridge Gate Driver datasheet (Rev. C) PDF | HTML 15 Oct 2015
More literature External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
More literature Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Oct 2018
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018
More literature AN-1317 Selection of External Bootstrap Diode for LM510X Devices (Rev. B) 04 May 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage 17 Apr 2018
EVM User's guide AN-1299 LM5041 Evaluation Board (Rev. A) 06 May 2013
EVM User's guide AN-1331 LM5033 Evaluation Board (Rev. A) 06 May 2013

Design & development

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LM5109B Unencrypted PSpice Transient Model

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LM51xx Schematic Review Template

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Design guide: PDF
Schematic: PDF
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SOIC (D) 8 View options
WSON (NGT) 8 View options

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