MSPM0G3519-Q1

AKTIV

ARM® Cortex®-M0+ MCU für die Automobilindustrie, 80 MHz, 512 kB Flash, 128 kB SRAM, 2 CAN, 2 ADC, DA

Produktdetails

CPU Arm Cortex-M0+ Frequency (MHz) 80 Flash memory (kByte) 512 RAM (kByte) 128 ADC type 12-bit SAR Features 5-V-tolerant I/Os, AEC Q100, AES encryption, CAN FD, Comparator, DAC, DMA, MATHACL, RTC UART 7 CAN (#) CAN-FD Security Cryptographic acceleration, Hardware-enforced isolation, Secure boot, Secure communication, Secure debug, Secure firmware & software update, Secure storage, Software IP protection TI functional safety category Functional Safety-Compliant Number of ADC channels 15, 19, 27 SPI 3 Operating temperature range (°C) -40 to 125 Rating Automotive Communication interface CAN-FD, I2C, LIN, SPI, UART Operating system FreeRTOS, Zephyr RTOS Hardware accelerators Trigonometric math accelerator Nonvolatile memory (kByte) 512 Number of GPIOs 28, 44, 60, 74, 94 Number of I2Cs 3
CPU Arm Cortex-M0+ Frequency (MHz) 80 Flash memory (kByte) 512 RAM (kByte) 128 ADC type 12-bit SAR Features 5-V-tolerant I/Os, AEC Q100, AES encryption, CAN FD, Comparator, DAC, DMA, MATHACL, RTC UART 7 CAN (#) CAN-FD Security Cryptographic acceleration, Hardware-enforced isolation, Secure boot, Secure communication, Secure debug, Secure firmware & software update, Secure storage, Software IP protection TI functional safety category Functional Safety-Compliant Number of ADC channels 15, 19, 27 SPI 3 Operating temperature range (°C) -40 to 125 Rating Automotive Communication interface CAN-FD, I2C, LIN, SPI, UART Operating system FreeRTOS, Zephyr RTOS Hardware accelerators Trigonometric math accelerator Nonvolatile memory (kByte) 512 Number of GPIOs 28, 44, 60, 74, 94 Number of I2Cs 3
LQFP (PM) 64 144 mm² (12 mm × 12 mm) LQFP (PN) 80 196 mm² (14 mm × 14 mm) VQFN (RGZ) 48 49 mm² (7 mm × 7 mm) LQFP (PT) 48 81 mm² (9 mm × 9 mm) VQFN (RHB) 32 25 mm² (5 mm × 5 mm)
  • Core
    • Arm 32-bit Cortex M0+ CPU with memory protection unit, frequency up to 80MHz
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications

    • Documentation to aid ISO 26262 system design will be available
    • Systematic capability up to ASIL B targeted

  • PSA-L1 Certification targeted
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 512KB of flash memory with error correction code (ECC)
      • Dual-bank with address swap for OTA updates

    • 16KB data flash bank with ECC protection
    • 128KB total SRAM
      • SRAM (Bank 0): 64kB SRAM with ECC protection or hardware parity, and retention down to STANDBY mode
      • SRAM (Bank 1): 64kB SRAM with retention down to STOP mode
  • High-performance analog peripherals
    • Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
      • 14-bit effective resolution at 250ksps with hardware averaging
    • Three high-speed comparators (COMP) with integrated 8-bit reference DACs
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • One 12-bit 1Msps digital-to-analog converter (DAC) with integrated output buffer
    • Programmable analog connections between ADC, COMP and DAC
    • Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 123µA/MHz (CoreMark)
    • SLEEP: 38µA/MHz
    • STOP: 223µA at 4MHz
    • STANDBY: 1.7µA at 32kHz with RTC and SRAM Bank 0 and state retention
    • SHUTDOWN: 92nA with IO wake-up capability
  • Intelligent digital peripherals
    • 12-channel DMA controller
    • Math accelerator supports DIV, SQRT, MAC and TRIG computations
    • Nine timers support up to 28 PWM channels
      • Two 16-bit general-purpose timers support QEI
      • Four 16-bit general-purpose timers support low-power operation in STANDBY mode
      • One 32-bit general-purpose timer
      • Two 16-bit advanced timers with deadband support and complimentary outputs up to 12 PWM channels
    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Seven UART interfaces
      • Two supporting LIN, IrDA, DALI, Smart Card, Manchester
      • Three supporting low-power operation in STANDBY mode
    • Three I2C interfaces supporting up to FM+ (1Mbit/s), SMBus/PMBus, and wakeup from STOP mode
    • Three SPI interfaces, with one supporting up to 32Mbits/s
    • Two Controller Area Network (CAN) interfaces support CAN 2.0 A or B and CAN-FD
  • Clock system
    • Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80MHz
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4 to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Data integrity and encryption
    • AES-128/256 accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • True random number generator (TRNG)
    • Cyclic redundancy checker (CRC-16, CRC-32)
  • Flexible I/O features
    • Up to 94 GPIOs
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Four high-speed IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 100-pin LQFP (PZ) (0.5mm pitch)
    • 80-pin LQFP (PN) (0.5mm pitch)
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch, wettable flank)
    • 32-pin VQFN (RHB) (0.5mm pitch, wettable flank)
  • Family members (also see Device Comparison)
    • MSPM0G3518-Q1: 256KB flash, 128KB RAM
    • MSPM0G3519-Q1: 512KB flash, 128KB RAM
  • Development kits and software (also see Tools and Software)
  • Automotive qualification
    • AEC-Q100 Grade 1 (-40°C to 125°C)
    • Wettable flank for 32-pin and 48-pin VQFN options
  • Core
    • Arm 32-bit Cortex M0+ CPU with memory protection unit, frequency up to 80MHz
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications

    • Documentation to aid ISO 26262 system design will be available
    • Systematic capability up to ASIL B targeted

  • PSA-L1 Certification targeted
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 512KB of flash memory with error correction code (ECC)
      • Dual-bank with address swap for OTA updates

    • 16KB data flash bank with ECC protection
    • 128KB total SRAM
      • SRAM (Bank 0): 64kB SRAM with ECC protection or hardware parity, and retention down to STANDBY mode
      • SRAM (Bank 1): 64kB SRAM with retention down to STOP mode
  • High-performance analog peripherals
    • Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
      • 14-bit effective resolution at 250ksps with hardware averaging
    • Three high-speed comparators (COMP) with integrated 8-bit reference DACs
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • One 12-bit 1Msps digital-to-analog converter (DAC) with integrated output buffer
    • Programmable analog connections between ADC, COMP and DAC
    • Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 123µA/MHz (CoreMark)
    • SLEEP: 38µA/MHz
    • STOP: 223µA at 4MHz
    • STANDBY: 1.7µA at 32kHz with RTC and SRAM Bank 0 and state retention
    • SHUTDOWN: 92nA with IO wake-up capability
  • Intelligent digital peripherals
    • 12-channel DMA controller
    • Math accelerator supports DIV, SQRT, MAC and TRIG computations
    • Nine timers support up to 28 PWM channels
      • Two 16-bit general-purpose timers support QEI
      • Four 16-bit general-purpose timers support low-power operation in STANDBY mode
      • One 32-bit general-purpose timer
      • Two 16-bit advanced timers with deadband support and complimentary outputs up to 12 PWM channels
    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Seven UART interfaces
      • Two supporting LIN, IrDA, DALI, Smart Card, Manchester
      • Three supporting low-power operation in STANDBY mode
    • Three I2C interfaces supporting up to FM+ (1Mbit/s), SMBus/PMBus, and wakeup from STOP mode
    • Three SPI interfaces, with one supporting up to 32Mbits/s
    • Two Controller Area Network (CAN) interfaces support CAN 2.0 A or B and CAN-FD
  • Clock system
    • Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80MHz
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4 to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Data integrity and encryption
    • AES-128/256 accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • True random number generator (TRNG)
    • Cyclic redundancy checker (CRC-16, CRC-32)
  • Flexible I/O features
    • Up to 94 GPIOs
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Four high-speed IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 100-pin LQFP (PZ) (0.5mm pitch)
    • 80-pin LQFP (PN) (0.5mm pitch)
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch, wettable flank)
    • 32-pin VQFN (RHB) (0.5mm pitch, wettable flank)
  • Family members (also see Device Comparison)
    • MSPM0G3518-Q1: 256KB flash, 128KB RAM
    • MSPM0G3519-Q1: 512KB flash, 128KB RAM
  • Development kits and software (also see Tools and Software)
  • Automotive qualification
    • AEC-Q100 Grade 1 (-40°C to 125°C)
    • Wettable flank for 32-pin and 48-pin VQFN options

MSPM0G351x-Q1 microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 256KB to 512KB of flash memory in small packages or high pin count packages (up to 100 pins). These devices include dual CAN-FD controllers, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.

The device has up to 512KB of embedded flash program memory with built-in error correction code (ECC) and up to 128KB SRAM (with ECC and parity protection for the first 64kB). The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.

Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes, as well as a TRNG entropy source. The cybersecurity architecture is pending Arm® PSA Level 1 certification.

A set of high performance analog modules is provided, such as two simultaneously sampling 12-bit, 4Msps ADCs supporting up to 27 external channels, on-chip voltage reference (1.4V or 2.5V), one 12-bit 1Msps DAC, and three comparators operable in low-power and high-speed modes with additional built-in 8-bit reference DACs .

The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration allowing for customers find the MCU that meets their project’s needs. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.

MSPM0G351x-Q1 MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.

For complete module descriptions, see the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.

MSPM0G351x-Q1 microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 256KB to 512KB of flash memory in small packages or high pin count packages (up to 100 pins). These devices include dual CAN-FD controllers, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.

The device has up to 512KB of embedded flash program memory with built-in error correction code (ECC) and up to 128KB SRAM (with ECC and parity protection for the first 64kB). The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.

Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes, as well as a TRNG entropy source. The cybersecurity architecture is pending Arm® PSA Level 1 certification.

A set of high performance analog modules is provided, such as two simultaneously sampling 12-bit, 4Msps ADCs supporting up to 27 external channels, on-chip voltage reference (1.4V or 2.5V), one 12-bit 1Msps DAC, and three comparators operable in low-power and high-speed modes with additional built-in 8-bit reference DACs .

The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration allowing for customers find the MCU that meets their project’s needs. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.

MSPM0G351x-Q1 MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.

For complete module descriptions, see the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt MSPM0G351x-Q1 Automotive Mixed-Signal Microcontrollers With CAN-FD Interface datasheet (Rev. B) PDF | HTML 28.10.2025
* Benutzerhandbuch MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual (Rev. E) PDF | HTML 28.07.2026
* Errata MSPM0Gx51x Mixed-Signal Microcontrollers Errata (Rev. E) PDF | HTML 06.07.2026
Benutzerhandbuch MSPM0 Bootloader User's Guide (Rev. A) PDF | HTML 08.01.2026
Anwendungshinweis Cybersecurity Enablers in MSPM0 MCUs (Rev. A) PDF | HTML 10.12.2025
Anwendungshinweis EMC Improvement Guide for MSPM0 (Rev. A) PDF | HTML 02.12.2025
Anwendungshinweis MSPM0 ADC Noise Analysis and Application (Rev. A) PDF | HTML 14.11.2025
Subsystemdesign ADC to I2C (Rev. A) PDF | HTML 10.09.2025
Subsystemdesign Thermistor Temperature Sensing (Rev. A) PDF | HTML 09.09.2025
Subsystemdesign ADC to UART (Rev. A) PDF | HTML 09.09.2025
Benutzerhandbuch MSPM0 MCUs Development Guide (Rev. G) PDF | HTML 27.08.2025
Subsystemdesign ADC to SPI (Rev. A) PDF | HTML 27.08.2025
Subsystemdesign Digital FIR Filter (Rev. A) PDF | HTML 27.08.2025
Subsystemdesign Digital IIR Filter (Rev. A) PDF | HTML 26.08.2025
Subsystemdesign Power Sequencer (Rev. A) PDF | HTML 25.08.2025
Subsystemdesign 5V Interface (Rev. A) PDF | HTML 20.08.2025
Subsystemdesign Data Sensor Aggregator Subsystem Design (Rev. A) PDF | HTML 20.08.2025
Subsystemdesign CAN to UART bridge (Rev. A) PDF | HTML 19.08.2025
Subsystemdesign CAN to SPI Bridge (Rev. A) PDF | HTML 19.08.2025
Subsystemdesign CAN to I2C Bridge (Rev. A) PDF | HTML 19.08.2025
Subsystemdesign PWM Control Using Push-Buttons PDF | HTML 14.08.2025
Subsystemdesign Using MSPM0 as a Watchdog Timer PDF | HTML 14.08.2025
Subsystemdesign Emulate EEPROM with FLASH (Type A) (Rev. A) PDF | HTML 13.08.2025
Subsystemdesign Emulate EEPROM With FLASH (Type B) (Rev. A) PDF | HTML 06.08.2025
Subsystemdesign Frequency Counter: Tone Detection (Rev. A) PDF | HTML 06.08.2025
Subsystemdesign Simultaneous Sampling of ADCs PDF | HTML 30.06.2025
Analog Design Journal Choosing a position sensor in motor control PDF | HTML 27.06.2025
Anwendungshinweis Capturing PWM 0% to 100% Duty Cycle with MSPM0 MCU PDF | HTML 12.06.2025
Anwendungshinweis Migration Guide From STM8 to MSPM0 (Rev. A) PDF | HTML 21.05.2025
Whitepaper MSPM0 MCU Advantages in Automotive Application PDF | HTML 11.03.2025
Anwendungshinweis LIN Basics and Implementation on MSPM0 PDF | HTML 21.02.2025
Anwendungshinweis Laser Speckle Reduction Solution in Projector based on MSPM0 MCU PDF | HTML 20.02.2025
Benutzerhandbuch Migration Guide From NXP to MSPM0 PDF | HTML 03.02.2025
Anwendungshinweis Closed Loop Constant Power Drive to Simplify Heater Element Control and Extend Battery Life PDF | HTML 29.01.2025
Anwendungshinweis BQ79616 Control Based on MSPM0 Through UART to CAN PDF | HTML 16.12.2024
Anwendungshinweis MSPM0G3507 Low Power Test and Guidance PDF | HTML 18.10.2024
Anwendungshinweis Understanding the MSPM0 Debug Subsystem PDF | HTML 23.09.2024
Anwendungshinweis A2L Refrigerant Standard Overview and TI Mitigation Control Board Designs for Designers PDF | HTML 16.09.2024
Anwendungshinweis TPS929xxx LED Driver Control Using MSPM0 Through UART Over CAN PDF | HTML 04.09.2024
Anwendungshinweis SPI to CAN Bridge on MSPM0 MCUs PDF | HTML 28.08.2024
Application brief Bridge Design Between CAN and UART with MSPM0 MCUs PDF | HTML 17.06.2024
Application brief Bridge Design Between CAN and SPI with MSPM0 MCUs PDF | HTML 17.06.2024
Application brief Bridge Design between CAN and I2C with MSPM0 MCUs 17.06.2024
Anwendungshinweis Designing Temperature Monitoring Systems with NTC and RTD PDF | HTML 15.05.2024
Application brief Automotive Seat Comfort Module Using MSPM0 PDF | HTML 01.05.2024
Anwendungshinweis Realization of Password-Protected Debug Based on Software PDF | HTML 06.03.2024
Product overview Realizing UWB Passive Entry Passive Start (PEPS) Design with MSPM0 MCU PDF | HTML 12.01.2024
Technischer Artikel Why interoperability matters to an evolving EV charging market PDF | HTML 05.01.2024
Product overview Realizing HVAC FAN Control Design with MSPM0 MCU PDF | HTML 21.12.2023
Anwendungshinweis MSPM0 Enables Cost-Effective Field Transmitter Applications PDF | HTML 15.12.2023
Anwendungshinweis Operating Time of MSPM0 Powered by a Capacitor PDF | HTML 03.10.2023
Anwendungshinweis EEPROM Emulation Type A Solution PDF | HTML 18.04.2023
Anwendungshinweis EEPROM Emulation Type B Design PDF | HTML 11.04.2023
Application brief Optimizing Field Sensor and Transmitter Applications With MSPM0 MCUs PDF | HTML 02.03.2023
Application brief Increasing Flexibility in Your Battery Management Designs With a Low-Cost MSPM0 PDF | HTML 02.03.2023
Application brief Simplifying Pulse Oximeter Designs With Low-Cost Highly Integrated MSPM0 MCUs PDF | HTML 02.03.2023
Anwendungshinweis MSPM0 G-Series MCUs Power Optimization Guide PDF | HTML 22.02.2023
Anwendungshinweis Make System Design Easy With MSPM0 Precision Analog PDF | HTML 22.02.2023
Whitepaper MSPM0: Idea to Product With Easy-to-Use Tools, Software, and Academy PDF | HTML 22.02.2023
Anwendungshinweis MSPM0L or MSPM0G: How to Pick the Right MSP Microcontroller for Your Application PDF | HTML 13.12.2022

Design und Entwicklung

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Anwendungssoftware und Frameworks

ISOFT-3P-AUTOSAR — iSOFT-Softwareprodukte für die Automobilinfrastruktur

iSOFT bietet eine komplette MSPM0-basierte Classic-Platform-AUTOSAR-Lösung für OEMs und Teilelieferanten. Es wird maßgeschneiderte Software bereitgestellt und die Migration auf Basis von MSPM0 unterstützt.

  • Vollständige AUTOSAR-Entwicklungs-Toolchain mit SWC-Design, BSW-Konfiguration und (...)
Unterstützte Produkte und Hardware
Anwendungssoftware und Frameworks

STK-3P-STK1000 — Ein Anwendungsbeispiel unter Verwendung des MSPM0G35xx mit dem STK-3P-STK1000-Kit

Die STK-3P-STK1000-Anwendungslösung auf Basis der MSPM0G3519-Hochleistungs-MCU von TI und des für Automobilanwendungen entwickelten DRV8316-Motortreibers integriert einen leichten, zuverlässigen CAN/LIN-Protokollstack, um eine effiziente Netzwerkkommunikation im Fahrzeug bei minimalem (...)

Unterstützte Produkte und Hardware
Treiber oder Bibliothek

MSP-SAFETY-LIB — API Library for select Safety Mechanisms for MSP Families

MSP Safety Library provides APIs for select safety mechanisms based on the corresponding device safety manual along with usage examples and documentation
Unterstützte Produkte und Hardware
Treiber oder Bibliothek

MSPM0-DIAGNOSTIC-LIB — MSPM0 diagnostic library

Das Software Development Kit (SDK) für die Diagnosebibliothek MSPM0 ist eine Sammlung von Software für funktionale Sicherheit, die Kunden bei der Erfüllung ihrer Diagnoseanforderungen für funktionale Sicherheit unterstützt.

Unterstützte Produkte und Hardware
Treiber oder Bibliothek

MSPM0-DIAGNOSTIC-LIB — MSPM0 diagnostic library

Das Software Development Kit (SDK) für die Diagnosebibliothek MSPM0 ist eine Sammlung von Software für funktionale Sicherheit, die Kunden bei der Erfüllung ihrer Diagnoseanforderungen für funktionale Sicherheit unterstützt.

Unterstützte Produkte und Hardware
Treiber oder Bibliothek

MSPM0G351X-Q1-FS — MSPM0G351x functional safety information

To provide functional safety information of MSPM0G351X-Q1
Unterstützte Produkte und Hardware
GUI für Evaluierungsmodul (EVM)

LP-MSPM0G3507-OOBE — Out-of-box experience GUI for LP-MSPM0G3507

Out-of-box experience GUI for LP-MSPM0G3507
Unterstützte Produkte und Hardware
GUI für Evaluierungsmodul (EVM)

MSPM0-ANALOG-CONFIGURATOR — Analog Configurator for MSPM0

Der MSPM0 „Analog Configurator“ ist ein grafisches Konfigurationstool, das den Entwurf und die Bereitstellung einer analogen Signalkette mit einem MSPM0-Baustein vereinfacht und beschleunigt, ohne dass eine traditionelle Codierungsentwicklung erforderlich ist.

Das Tool verwendet eine intuitive (...)

Unterstützte Produkte und Hardware
Software-Programmiertool

MSP-GANG-SOFTWARE — MSP-GANG Software

The MSP Gang Programmer (MSP-GANG) is a MSPM0/MSP430/MSP432 device programmer that can program up to eight identical devices at the same time.
Unterstützte Produkte und Hardware
Software-Programmiertool

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash ist Teil des umfassenden CCStudio™-Entwicklungsökosystem von TI und ein Softwaretool zur Programmierung des integrierten Flash-Speichers von TI-Mikrocontrollern und drahtlosen Kommunikationsbausteinen sowie des integrierten Flash-Speichers für TI-Prozessoren. UniFlash bietet sowohl (...)

Unterstützte Produkte und Hardware
Berechnungstool

MSPM0-CALC — Power estimation tool for the MSPM0 platform

This tool can be used by engineers to estimate power consumption in different modes of operation for the MSPM0 device family.
Unterstützte Produkte und Hardware
Referenzdesign

TIDA-020093 — Referenzdesign für Ein-Chip-mmWave-Streaming-Radar für Automobilfrontradar

Die Automobilindustrie widmet sich mithilfe weiterer autonomen Fahrfunktionen der Radarwert- und Leistungsoptimierung. Die Radarleistung und die Kosten können durch Streaming-Topologien mit rohen Radardaten verbessert werden. Dieses Referenzdesign unterstützt das AWR2188-Radarfrontend mit 8TX- und (...)

Unterstützte Produkte und Hardware
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
LQFP (PM) 64 Ultra Librarian
LQFP (PN) 80 Ultra Librarian
VQFN (RGZ) 48 Ultra Librarian
LQFP (PT) 48 Ultra Librarian
VQFN (RHB) 32 Ultra Librarian

Bestellen & Qualität

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