SN74AVC32T245

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Bus-Transceiver, Doppelversorgung, 32 Bit, konfigurierbare Spannungsumsetzung, Tri-State-Ausgänge

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Datenblatt

document-pdfAcrobat SN74AVC32T245 32-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation, Level-Shifting, and Tri-State Outputs datasheet (Rev. H) (Englisch) PDF | HTML

SN74AVC32T245

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Bits (#)

32

Data rate (max) (Mbps)

380

Topology

Push-Pull

Direction control (typ)

Direction-controlled

Vin (min) (V)

1.2

Vin (max) (V)

3.6

Vout (min) (V)

1.2

Vout (max) (V)

3.6

Applications

GPIO

Features

Output enable, Overvoltage tolerant inputs, Partial power down (Ioff)

Technology family

AVC

Supply current (max) (mA)

0.09

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Bits (#)

32

Data rate (max) (Mbps)

380

Topology

Push-Pull

Direction control (typ)

Direction-controlled

Vin (min) (V)

1.2

Vin (max) (V)

3.6

Vout (min) (V)

1.2

Vout (max) (V)

3.6

Applications

GPIO

Features

Output enable, Overvoltage tolerant inputs, Partial power down (Ioff)

Technology family

AVC

Supply current (max) (mA)

0.09

Rating

Catalog

Operating temperature range (°C)

-40 to 85

NFBGA (NMJ)

96

74.25 mm² (13.5 mm × 5.5 mm)

Member of the Texas Instruments Widebus+™ Family
Control Inputs V_IH/V_IL Levels Referenced to V_CCA Voltage
V_CC Isolation Feature – If Either V_CC Input is at GND, Both Ports are in the High-Impedance State
Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
Fully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.2 V to 3.6 V Power-Supply Range
I_off Supports Partial-Power-Down Mode Operation
4.6 V Tolerant I/Os
Max Data Rates
- 380 Mbps (1.8 V to 3.3 V Level-Shifting)
- 200 Mbps (< 1.8 V to 3.3 V Level-Shifting)
- 200 Mbps (Translate to 2.5 V or 1.8 V)
- 150 Mbps (Translate to 1.5 V)
- 100 Mbps (Translate to 1.2 V)
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 4000 V Human-Body Model (A114-A)
- 1000 V Charged-Device Model (C101)

Member of the Texas Instruments Widebus+™ Family
Control Inputs V_IH/V_IL Levels Referenced to V_CCA Voltage
V_CC Isolation Feature – If Either V_CC Input is at GND, Both Ports are in the High-Impedance State
Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
Fully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.2 V to 3.6 V Power-Supply Range
I_off Supports Partial-Power-Down Mode Operation
4.6 V Tolerant I/Os
Max Data Rates
- 380 Mbps (1.8 V to 3.3 V Level-Shifting)
- 200 Mbps (< 1.8 V to 3.3 V Level-Shifting)
- 200 Mbps (Translate to 2.5 V or 1.8 V)
- 150 Mbps (Translate to 1.5 V)
- 100 Mbps (Translate to 1.2 V)
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 4000 V Human-Body Model (A114-A)
- 1000 V Charged-Device Model (C101)

This 32-bit noninverting bus transceiver uses two separate, configurable power-supply rails. The SN74AVC32T245 device is optimized to operate with V_CCA/V_CCB set from 1.4 V to 3.6 V. It is operational with V_CCA/V_CCB as low as 1.2 V. The A port is designed to track V_CCA. V_CCA and accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track V_CCB. V_CCB and accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.

The SN74AVC32T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable ( OE) input can disable the outputs so the buses are effectively isolated.

The SN74AVC32T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 1 OE, 2 OE, 3 OE, and 4 OE) are supplied by V_CCA.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The V_CC isolation feature ensures that if either V_CC input is at GND, then both ports are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This 32-bit noninverting bus transceiver uses two separate, configurable power-supply rails. The SN74AVC32T245 device is optimized to operate with V_CCA/V_CCB set from 1.4 V to 3.6 V. It is operational with V_CCA/V_CCB as low as 1.2 V. The A port is designed to track V_CCA. V_CCA and accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track V_CCB. V_CCB and accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.

The SN74AVC32T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable ( OE) input can disable the outputs so the buses are effectively isolated.

The SN74AVC32T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 1 OE, 2 OE, 3 OE, and 4 OE) are supplied by V_CCA.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The V_CC isolation feature ensures that if either V_CC input is at GND, then both ports are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Top-Dokumentation	Typ	Titel	Format-Optionen	Datum
*	Datenblatt	SN74AVC32T245 32-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation, Level-Shifting, and Tri-State Outputs datasheet (Rev. H)	PDF \| HTML	11.11.2020
	Anwendungshinweis	Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators	PDF \| HTML	02.10.2024
	Anwendungshinweis	Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators	PDF \| HTML	12.07.2024
	Anwendungshinweis	Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A)	PDF \| HTML	03.07.2024
	Auswahlhilfe	Voltage Translation Buying Guide (Rev. A)		15.04.2021

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