Startseite Energiemanagement Gate-Treiber Isolierte Gate-Treiber

UCC21320-Q1

AKTIV

Zweikanaliger isolierter Gate-Treiber für die Automobilindustrie mit 3,75kVrms, 4A/6A und programmie

Eine neuere Version dieses Produkts ist verfügbar

Drop-In-Ersatz mit gegenüber dem verglichenen Baustein verbesserter Funktionalität
UCC21550-Q1 AKTIV Isolierter Zweikanal-Gate-Treiber mit 4 A/6 A, 5 kVRMS, DIS- und DT-Pins für IGBT Next gen P2P refresh

Produktdetails

Number of channels 2 Isolation rating Basic Power switch IGBT, MOSFET, SiCFET Withstand isolation voltage (VISO) (Vrms) 3750 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 5303, 6250 Peak output current (A) 6 Peak output current (source) (typ) (A) 4 Peak output current (sink) (typ) (A) 6 Features Disable, Programmable dead time Output VCC/VDD (min) (V) 9.2 Output VCC/VDD (max) (V) 25 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Automotive Rise time (ns) 6 Fall time (ns) 19 Undervoltage lockout (typ) (V) 8, 12
Number of channels 2 Isolation rating Basic Power switch IGBT, MOSFET, SiCFET Withstand isolation voltage (VISO) (Vrms) 3750 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 5303, 6250 Peak output current (A) 6 Peak output current (source) (typ) (A) 4 Peak output current (sink) (typ) (A) 6 Features Disable, Programmable dead time Output VCC/VDD (min) (V) 9.2 Output VCC/VDD (max) (V) 25 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Automotive Rise time (ns) 6 Fall time (ns) 19 Undervoltage lockout (typ) (V) 8, 12
SOIC (DWK) 14 106.09 mm² 10.3 x 10.3
  • 4A peak source, 6A peak sink output
  • 3V to 18V input VCCI range to interface with both digital and analog controllers
  • Up to 25V VDD output drive supply
  • Switching parameters:
    • 33ns typical propagation delay
    • 20ns minimum pulse width
    • 6ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • Universal: dual low-side, dual high-side or half-bridge driver
  • Programmable overlap and dead time
  • Wide body SOIC-14 (DWK) package
    • 3.3mm spacing between driver channels
  • Junction temperature range –40 to +150°C
  • TTL and CMOS compatible inputs
  • Fast disable for power sequencing
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
  • 4A peak source, 6A peak sink output
  • 3V to 18V input VCCI range to interface with both digital and analog controllers
  • Up to 25V VDD output drive supply
  • Switching parameters:
    • 33ns typical propagation delay
    • 20ns minimum pulse width
    • 6ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • Universal: dual low-side, dual high-side or half-bridge driver
  • Programmable overlap and dead time
  • Wide body SOIC-14 (DWK) package
    • 3.3mm spacing between driver channels
  • Junction temperature range –40 to +150°C
  • TTL and CMOS compatible inputs
  • Fast disable for power sequencing
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results
    • Device temperature grade 1

The UCC21320-Q1 is an isolated dual-channel gate driver with 4A source and 6A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5MHz.

The input side is isolated from the two output drivers by a 3.75kVRMS basic isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25V. A wide input VCCI range from 3V to 18V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21320-Q1 enables high efficiency, high power density, and robustness.

The UCC21320-Q1 is an isolated dual-channel gate driver with 4A source and 6A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5MHz.

The input side is isolated from the two output drivers by a 3.75kVRMS basic isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25V. A wide input VCCI range from 3V to 18V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21320-Q1 enables high efficiency, high power density, and robustness.

Herunterladen Video mit Transkript ansehen Video

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 2
Typ Titel Datum
* Data sheet UCC21320 -Q1 4A, 6A, 3.75kVRMS Isolated Dual-Channel Gate Driver for Automotive datasheet (Rev. A) PDF | HTML 23 Aug 2024
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 Dez 2021

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese Design- und Simulationssuite mit vollem Funktionsumfang verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
SOIC (DWK) 14 Ultra Librarian

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Empfohlene Produkte können Parameter, Evaluierungsmodule oder Referenzdesigns zu diesem TI-Produkt beinhalten.

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos