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CD4001UB-MIL

ACTIVO

Puertas NOR de grado militar de 4 canales, 2 entradas, 3 V a 18 V

Detalles del producto

Technology family CD4000 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 1.5 IOH (max) (mA) -1.5 Output type Push-Pull Input type Standard CMOS Features Standard speed (tpd > 50ns) Data rate (max) (Mbps) 8 Rating Military Operating temperature range (°C) -55 to 125
Technology family CD4000 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 1.5 IOH (max) (mA) -1.5 Output type Push-Pull Input type Standard CMOS Features Standard speed (tpd > 50ns) Data rate (max) (Mbps) 8 Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² (— mm × — mm)
  • Propagation delay time = 30 ns (typ.) at CL = 50 pF, VDD = 10 V
  • Standardized symmetrical output characteristics
  • 100% tested for maximum quiescent current at 20 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • 5-V, 10-V, and 15-V parametric ratings

Data sheet acquired from Harris Semiconductor

  • Propagation delay time = 30 ns (typ.) at CL = 50 pF, VDD = 10 V
  • Standardized symmetrical output characteristics
  • 100% tested for maximum quiescent current at 20 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • 5-V, 10-V, and 15-V parametric ratings

Data sheet acquired from Harris Semiconductor

CD4001UB quad 2-input NOR gate provides the system designer with direct implementation of the NOR function and supplements the existing family of CMOS gates.

The CD4001UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4001UB quad 2-input NOR gate provides the system designer with direct implementation of the NOR function and supplements the existing family of CMOS gates.

The CD4001UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

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* Hoja de datos CD4001UB TYPES datasheet (Rev. C) 21/08/2003

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