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DS91M040

アクティブ

125MHz、クワッド M-LVDS トランシーバ

製品詳細

Function Transceiver Protocols BLVDS, CML, LVDS, LVPECL, M-LVDS Number of transmitters 4 Number of receivers 4 Signaling rate (Mbps) 250 Input signal BLVDS, CML, LVCMOS, LVDS, LVPECL, LVTTL, M-LVDS Output signal LVCMOS, LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols BLVDS, CML, LVDS, LVPECL, M-LVDS Number of transmitters 4 Number of receivers 4 Signaling rate (Mbps) 250 Input signal BLVDS, CML, LVCMOS, LVDS, LVPECL, LVTTL, M-LVDS Output signal LVCMOS, LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WQFN (RTV) 32 25 mm² (5 mm × 5 mm)
  • DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
  • Wide Input Common Mode Voltage Range Allows up to ±1V of GND Noise
  • Conforms to TIA/EIA-899 M-LVDS Standard
  • Pin Selectable M-LVDS Receiver Type (1 or 2)
  • Controlled Transition Times (2.0 ns typ) Minimize Reflections
  • 8 kV ESD on M-LVDS I/O pins protects adjoining components
  • Flow-Through Pinout Simplifies PCB Layout
  • Small 5 mm x 5 mm WQFN-32 Space Saving Package

All trademarks are the property of their respective owners.

  • DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
  • Wide Input Common Mode Voltage Range Allows up to ±1V of GND Noise
  • Conforms to TIA/EIA-899 M-LVDS Standard
  • Pin Selectable M-LVDS Receiver Type (1 or 2)
  • Controlled Transition Times (2.0 ns typ) Minimize Reflections
  • 8 kV ESD on M-LVDS I/O pins protects adjoining components
  • Flow-Through Pinout Simplifies PCB Layout
  • Small 5 mm x 5 mm WQFN-32 Space Saving Package

All trademarks are the property of their respective owners.

The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks.

M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs. M-LVDS devices also have a very large input common mode voltage range for additional noise margin in heavily loaded and noisy backplane environments.

A single DS91M040 channel is a half-duplex transceiver that accepts LVTTL/LVCMOS signals at the driver inputs and converts them to differential M-LVDS signal levels. The receiver inputs accept low voltage differential signals (LVDS, BLVDS, M-LVDS, LVPECL and CML) and convert them to 3V LVCMOS signals. The DS91M040 supports both M-LVDS type 1 and type 2 receiver inputs.

The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks.

M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs. M-LVDS devices also have a very large input common mode voltage range for additional noise margin in heavily loaded and noisy backplane environments.

A single DS91M040 channel is a half-duplex transceiver that accepts LVTTL/LVCMOS signals at the driver inputs and converts them to differential M-LVDS signal levels. The receiver inputs accept low voltage differential signals (LVDS, BLVDS, M-LVDS, LVPECL and CML) and convert them to 3V LVCMOS signals. The DS91M040 supports both M-LVDS type 1 and type 2 receiver inputs.

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DS91C176 アクティブ 100MHz、シングル チャネル M-LVDS トランシーバ Fewer channels (1T/1R), lower signaling rate (200 Mbps)

技術資料

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上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート DS91M040 125 MHz Quad M-LVDS Transceiver データシート (Rev. M) 2013/04/16
アプリケーション概要 How Far, How Fast Can You Operate MLVDS? 2018/08/06
アプリケーション・ノート Designing an ATCA Compliant M-LVDS Clock Distribution Network (Rev. B) 2013/04/26
アプリケーション・ノート Introduction to M-LVDS (TIA/EIA-899) (Rev. A) 2013/01/03
ユーザー・ガイド SMA to RJ45 Adapter Board User Guide 2012/01/26
アプリケーション・ノート Designing an ATCA Compliant M-LVDS Clock Distribution Network (jp) 2007/11/20

設計と開発

その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。

評価ボード

DS91M040EVK — 125MHz 4 回路 M-LVDS トランシーバ評価ボード

The DS91M040EVK is an evaluation board design for demonstration of all features and functions of the DS91M040. The DS91M040 is a high-speed quad M-LVDS differential transceiver designed for multipoint applications with multiple drivers or receivers. The device conforms to TIA/EIA-899 standard. It (...)

ユーザー ガイド: PDF
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インターフェイス・アダプタ

SMA2RJ45EVK — SMA から RJ45 へのアダプタ・ボード

The SMA2RJ45EVK is an SMA connector to RJ45 connector adapter boards developed to complement Texas Instruments' evaluation boards for which evaluation with CAT5e cable assemblies may be desirable (such as the DriveCable02EVK, LVDS-18B-EVK, DS25BR100EVK, and others).

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シミュレーション・モデル

DS91M040 IBIS Model

SNLM032.ZIP (47 KB) - IBIS モデル
サポート対象の製品とハードウェア
パッケージ ピン数 CAD シンボル、フットプリント、および 3D モデル
WQFN (RTV) 32 Ultra Librarian

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