UCC27523

アクティブ

5V UVLO とイネーブル搭載、複数の反転入力、5A/5A、デュアルチャネル・ゲート・ドライバ

製品詳細

Number of channels (#) 2 Power switch MOSFET, IGBT, GaNFET Peak output current (A) 5 Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 18 Features Enable Pin Operating temperature range (C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Prop delay (ns) 13 Input threshold CMOS, TTL Channel input logic Dual, Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (Typ) 4 Driver configuration Dual, Inverting
Number of channels (#) 2 Power switch MOSFET, IGBT, GaNFET Peak output current (A) 5 Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 18 Features Enable Pin Operating temperature range (C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Prop delay (ns) 13 Input threshold CMOS, TTL Channel input logic Dual, Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (Typ) 4 Driver configuration Dual, Inverting
HVSSOP (DGN) 8 9 mm² 3 x 3 SOIC (D) 8 19 mm² 4.9 x 3.9 WSON (DSD) 8 9 mm² 3 x 3
  • Industry-Standard Pinout
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink-Drive Current
  • Independent-Enable Function for Each Output
  • TTL and CMOS Compatible Logic Threshold
    Independent of Supply Voltage
  • Hysteretic-Logic Thresholds for High Noise
    Immunity
  • Inputs and Enable Pin-Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single-Supply Range
  • Outputs Held Low During VDD-UVLO, (Ensures
    Glitch-Free Operation at Power up and Power
    Down)
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between Two
    Channels
  • Two Outputs are in Parallel for Higher Drive
    Current
  • Outputs Held Low When Inputs Floating
  • PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and
    3-mm × 3-mm WSON-8 Package Options
  • Operating Temperature Range of –40°C to 140°C
  • Industry-Standard Pinout
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink-Drive Current
  • Independent-Enable Function for Each Output
  • TTL and CMOS Compatible Logic Threshold
    Independent of Supply Voltage
  • Hysteretic-Logic Thresholds for High Noise
    Immunity
  • Inputs and Enable Pin-Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single-Supply Range
  • Outputs Held Low During VDD-UVLO, (Ensures
    Glitch-Free Operation at Power up and Power
    Down)
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between Two
    Channels
  • Two Outputs are in Parallel for Higher Drive
    Current
  • Outputs Held Low When Inputs Floating
  • PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and
    3-mm × 3-mm WSON-8 Package Options
  • Operating Temperature Range of –40°C to 140°C

The UCC2752x family of devices are dual-channel, high-speed, low-side gate-driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 13 ns). In addition, the drivers feature matched internal propagation delays between the two channels. These delays are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with one input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC2752x family provide the combination of three standard logic options – dual inverting, dual noninverting, one inverting and one noninverting driver. UCC27526 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin controls the state of the driver output. The unused input pin is used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family ensure that outputs are held LOW when input pins are in floating condition. The UCC27523, UCC27524, and UCC27525 devices feature Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

UCC2752x family of devices are available in SOIC-8 (D), MSOP-8 with exposed pad (DGN) and 3-mm × 3-mm WSON-8 with exposed pad (DSD) packages. UCC27524 is also offered in PDIP-8 (P) package. UCC27526 is only offered in 3-mm × 3-mm WSON (DSD) package.

The UCC2752x family of devices are dual-channel, high-speed, low-side gate-driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 13 ns). In addition, the drivers feature matched internal propagation delays between the two channels. These delays are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with one input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC2752x family provide the combination of three standard logic options – dual inverting, dual noninverting, one inverting and one noninverting driver. UCC27526 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin controls the state of the driver output. The unused input pin is used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family ensure that outputs are held LOW when input pins are in floating condition. The UCC27523, UCC27524, and UCC27525 devices feature Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

UCC2752x family of devices are available in SOIC-8 (D), MSOP-8 with exposed pad (DGN) and 3-mm × 3-mm WSON-8 with exposed pad (DSD) packages. UCC27524 is also offered in PDIP-8 (P) package. UCC27526 is only offered in 3-mm × 3-mm WSON (DSD) package.

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技術資料

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種類 タイトル 最新の英語版をダウンロード 日付
* データシート UCC2752x Dual 5-A High-Speed, Low-Side Gate Driver データシート (Rev. G) PDF | HTML 2015年 4月 1日
技術記事 Managing power-supply noise with a 30-V gate driver 2021年 12月 7日
アプリケーション・ノート External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
アプリケーション・ノート Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
アプリケーション・ノート Why is Layout Critical for an Efficient DC-DC Conversion 2019年 5月 7日
その他の技術資料 Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018年 10月 29日
技術記事 How to achieve higher system robustness in DC drives, part 3: minimum input pulse 2018年 9月 19日
セレクション・ガイド 電源 IC セレクション・ガイド 2018 (Rev. R 翻訳版) 英語版をダウンロード (Rev.R) 2018年 9月 13日
技術記事 How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 2018年 5月 30日
技術記事 Boosting efficiency for your solar inverter designs 2018年 5月 24日
アプリケーション・ノート UCC27517 vs BJT Totem-Pole under UVLO Conditions 2018年 3月 16日
その他の技術資料 デュアル高速ローサイド・ゲート・ドライバ ピーク・シンク/ソース電流: 5A 2014年 4月 3日

設計および開発

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評価ボード

UCC27423-4-5-Q1EVM — UCC2742xQ1 イネーブル付き、デュアル、4A、高速ローサイド MOSFET ドライバの評価モジュール(EVM)

The UCC2742xQ1 EVM is a high-speed dual MOSFET evaluation module that provides a test platform for a quick and easy startup of the UCC2742xQ1 driver. Powered by a single 4V to 15V external supply, and featuring a comprehensive set of test points and jumpers. All of the devices have separate input (...)
ユーザー・ガイド: PDF
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シミュレーション・モデル

UCC27523 PSpice Transient Model

SLUM303.ZIP (46 KB) - PSpice Model
シミュレーション・モデル

UCC27523 Unencrypted PSpice Transient Model

SLUM476.ZIP (1 KB) - PSpice Model
計算ツール

UCC2752X Schematic Review Template

SLURB22.ZIP (110 KB)
シミュレーション・ツール

PSPICE-FOR-TI — TI Design / シミュレーション・ツール向け PSpice®

PSpice® for TI は、各種アナログ回路の機能評価に役立つ、設計とシミュレーション向けの環境です。設計とシミュレーションに適したこのフル機能スイートは、Cadence® のアナログ分析エンジンを使用しています。PSpice for TI は無償で使用でき、アナログや電源に関する TI の製品ラインアップを対象とする、業界でも有数の大規模なモデル・ライブラリが付属しているほか、選択された一部のアナログ動作モデルも利用できます。

設計とシミュレーション向けの環境である PSpice for TI (...)
パッケージ ピン数 ダウンロード
HVSSOP (DGN) 8 オプションの表示
SOIC (D) 8 オプションの表示
SON (DSD) 8 オプションの表示

購入と品質

記載されている情報:
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL rating / リフローピーク温度
  • MTBF/FIT 推定値
  • 原材料組成
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果

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