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Applications Wireless infrastructure Number of TXs and RXs 4 TX Number of DUCs per TX 4 Number of DDCs per RX 4 RF frequency (max) (MHz) 6000 RF frequency (min) (MHz) 600 Operating temperature range (°C) -40 to 85 Rating Catalog
Applications Wireless infrastructure Number of TXs and RXs 4 TX Number of DUCs per TX 4 Number of DDCs per RX 4 RF frequency (max) (MHz) 6000 RF frequency (min) (MHz) 600 Operating temperature range (°C) -40 to 85 Rating Catalog
FCBGA (ABJ) 400 289 mm² 17 x 17
  • Quad (AFE776xD) / Dual (AFE7728D) transmitters based on 0-IF up-conversion architecture:
    • Up to 650 MHz (AFE77x8D) / 730 MHz (AFE7769D) of RF transmitted DPD expansion bandwidth per chain
  • Quad (AFE776xD) / Dual (AFE7728D) receivers based on 0-IF down-conversion architecture:
    • Up to 200 MHz (AFE77x8D) / 300 MHz (AFE7769D) of RF received bandwidth per chain
  • Feedback chain based on direct RF sampling architecture:
    • Up to 650 MHz (AFE77x8D) / 730 MHz (AFE7769D) of RF observed DPD expansion bandwidth
  • Integrated CFR/DPD for PA linearization
    • Up to 200MHz (AFE77x8D) / 300MHz (AFE7769D) instantaneous bandwidth
    • Up to 650MHz (AFE77x8D) / 730MHz (AFE7769D) DPD expansion bandwidth
  • Integrated CFR/DPD for PA linearization
    • Multistage CFR with configurable cancelling pulses
    • Hardware accelerated DPD estimation engine
    • Signal Dynamics based corrector for GaN PA linearization
    • Smart data capture
  • RF frequency range: 600 MHz to 6 GHz
  • Four wideband fractional-N PLL, VCO for TX and RX LO
  • Dedicated integer-N PLL, VCO for data converters clock generation
  • JESD204B and JESD204C SerDes interface support:
    • 4 SerDes transceivers up to 29.5 Gbps
    • 8b/10b and 64b/66b encoding
    • 16-bit, 12-bit, 24-bit and 32-bit formatting
    • Subclass 1 multi-device synchronization
  • Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch
  • Quad (AFE776xD) / Dual (AFE7728D) transmitters based on 0-IF up-conversion architecture:
    • Up to 650 MHz (AFE77x8D) / 730 MHz (AFE7769D) of RF transmitted DPD expansion bandwidth per chain
  • Quad (AFE776xD) / Dual (AFE7728D) receivers based on 0-IF down-conversion architecture:
    • Up to 200 MHz (AFE77x8D) / 300 MHz (AFE7769D) of RF received bandwidth per chain
  • Feedback chain based on direct RF sampling architecture:
    • Up to 650 MHz (AFE77x8D) / 730 MHz (AFE7769D) of RF observed DPD expansion bandwidth
  • Integrated CFR/DPD for PA linearization
    • Up to 200MHz (AFE77x8D) / 300MHz (AFE7769D) instantaneous bandwidth
    • Up to 650MHz (AFE77x8D) / 730MHz (AFE7769D) DPD expansion bandwidth
  • Integrated CFR/DPD for PA linearization
    • Multistage CFR with configurable cancelling pulses
    • Hardware accelerated DPD estimation engine
    • Signal Dynamics based corrector for GaN PA linearization
    • Smart data capture
  • RF frequency range: 600 MHz to 6 GHz
  • Four wideband fractional-N PLL, VCO for TX and RX LO
  • Dedicated integer-N PLL, VCO for data converters clock generation
  • JESD204B and JESD204C SerDes interface support:
    • 4 SerDes transceivers up to 29.5 Gbps
    • 8b/10b and 64b/66b encoding
    • 16-bit, 12-bit, 24-bit and 32-bit formatting
    • Subclass 1 multi-device synchronization
  • Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch

The AFE77xxD is a pin-compatible family of high-performance, multichannel transceivers, integrating four (AFE7768D/AFE7769D) or two (AFE7728D) direct up-conversion transmitter chains, four (AFE7768D/AFE7769D) or two (AFE7728D) direct down-conversion receiver chains, two wideband RF sampling digitizing auxiliary chains (feedback paths) and low-power Digital Pre-Distortion (DPD) engine for Power Amplifier (PA) linearization. The high dynamic range of the transmitter and receiver chains enables wireless base stations to transmit and receive 2G, 3G, 4G, and 5G signals. The integrated Crest Factor Reduction (CFR) unit helps reduce the Peak-to-Average Ratio (PAR) of the input signal for more efficient transmission through the Power Amplifier. The integrated hardware accelerated DPD estimator and corrector provides flexible and efficient DPD solution for PA linearization. The integrated DPD engine corrects the distortion due to PA nonlinearity for signals up to 200MHz (AFE77x8D) / 300MHz (AFE7769D) instantaneous bandwidth, and within up to 650MHz (AFE77x8D) / 730MHz (AFE7769D) DPD expanded bandwidth. A dedicated GaN corrector addresses the long-term nonlinear memory effects due to charge trapping of GaN PAs.

The low power dissipation and high density channel integration of the AFE77xxD allow the device to address the power and size constraints of 4G and 5G base stations. The wideband and high dynamic range feedback path can assist the DPD of the power amplifiers in the transmitter chain through smart data capture at various intercepting points. The available 29.5Gbps SerDes speed can help reduce the number of lanes required to transfer the data in and out of the device.

Each receiver chain of the AFE77xxD includes a 28-dB range digital step attenuator (DSA), followed by a wideband passive IQ demodulator, and a baseband amplifier with integrated antialiasing low pass filters with programmable bandwidth, driving continuous-time sigma-delta ADCs. The RX chain can receive an instantaneous bandwidth (IBW) up to 200 MHz (AFE77x8D) / 300 MHz (AFE7769D). Each receiver channel has two analog peak power detectors and various digital power detectors to assist an external or internal autonomous AGC control for receiver channels, and a RF overload detector for device reliability protection. The integrated QMC (quadrature mismatch compensation) algorithm is capable to continuously monitor and correct for the RX chain I and Q imbalance mismatch without the need to inject any specific signals or perform offline calibration.

Each transmitter chain includes two 14-bit, 3.3-Gsps IQ DACs, followed by a programmable reconstruction and DAC image rejection filter, an IQ modulator driving a wideband RF amplifier with 39-dB range gain control. The TX chain integrated QMC and LO leakage cancellation algorithms, leveraging the FB path can constantly track and correct for the TX chain IQ mismatch and LO leakage.

Each FB path is based on RF sampling architecture, and includes an input RF DSA driving a 14-bit, 3.3-Gsps RF ADC. The direct sampling architecture provides an inherently wideband receiver chain and simplifies the calibration of the TX chains impairments. The FB path integrates two independent NCOs, which allow for a fast switching between two observed RF input bands.

The synthesizer section integrates four fractional-N RF PLLs that can generate four different RF LOs, allowing the device to support up to two different bands, each one configured as two transmitters, two receivers, and one feedback path (with AFE7768D/AFE7769D), or one transmitter, one receiver, and one feedback path (with AFE7728D) .

The AFE77xxD is a pin-compatible family of high-performance, multichannel transceivers, integrating four (AFE7768D/AFE7769D) or two (AFE7728D) direct up-conversion transmitter chains, four (AFE7768D/AFE7769D) or two (AFE7728D) direct down-conversion receiver chains, two wideband RF sampling digitizing auxiliary chains (feedback paths) and low-power Digital Pre-Distortion (DPD) engine for Power Amplifier (PA) linearization. The high dynamic range of the transmitter and receiver chains enables wireless base stations to transmit and receive 2G, 3G, 4G, and 5G signals. The integrated Crest Factor Reduction (CFR) unit helps reduce the Peak-to-Average Ratio (PAR) of the input signal for more efficient transmission through the Power Amplifier. The integrated hardware accelerated DPD estimator and corrector provides flexible and efficient DPD solution for PA linearization. The integrated DPD engine corrects the distortion due to PA nonlinearity for signals up to 200MHz (AFE77x8D) / 300MHz (AFE7769D) instantaneous bandwidth, and within up to 650MHz (AFE77x8D) / 730MHz (AFE7769D) DPD expanded bandwidth. A dedicated GaN corrector addresses the long-term nonlinear memory effects due to charge trapping of GaN PAs.

The low power dissipation and high density channel integration of the AFE77xxD allow the device to address the power and size constraints of 4G and 5G base stations. The wideband and high dynamic range feedback path can assist the DPD of the power amplifiers in the transmitter chain through smart data capture at various intercepting points. The available 29.5Gbps SerDes speed can help reduce the number of lanes required to transfer the data in and out of the device.

Each receiver chain of the AFE77xxD includes a 28-dB range digital step attenuator (DSA), followed by a wideband passive IQ demodulator, and a baseband amplifier with integrated antialiasing low pass filters with programmable bandwidth, driving continuous-time sigma-delta ADCs. The RX chain can receive an instantaneous bandwidth (IBW) up to 200 MHz (AFE77x8D) / 300 MHz (AFE7769D). Each receiver channel has two analog peak power detectors and various digital power detectors to assist an external or internal autonomous AGC control for receiver channels, and a RF overload detector for device reliability protection. The integrated QMC (quadrature mismatch compensation) algorithm is capable to continuously monitor and correct for the RX chain I and Q imbalance mismatch without the need to inject any specific signals or perform offline calibration.

Each transmitter chain includes two 14-bit, 3.3-Gsps IQ DACs, followed by a programmable reconstruction and DAC image rejection filter, an IQ modulator driving a wideband RF amplifier with 39-dB range gain control. The TX chain integrated QMC and LO leakage cancellation algorithms, leveraging the FB path can constantly track and correct for the TX chain IQ mismatch and LO leakage.

Each FB path is based on RF sampling architecture, and includes an input RF DSA driving a 14-bit, 3.3-Gsps RF ADC. The direct sampling architecture provides an inherently wideband receiver chain and simplifies the calibration of the TX chains impairments. The FB path integrates two independent NCOs, which allow for a fast switching between two observed RF input bands.

The synthesizer section integrates four fractional-N RF PLLs that can generate four different RF LOs, allowing the device to support up to two different bands, each one configured as two transmitters, two receivers, and one feedback path (with AFE7768D/AFE7769D), or one transmitter, one receiver, and one feedback path (with AFE7728D) .

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추가 정보 요청

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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
AFE7769 활성 4전송, 4수신, 2 피드백 RF 트랜시버, 600MHz~6GHz, PLL 4개, 무선 용도 Select AFE7769 as a cost-efficient alternative without integrated DPD/CFR. Use if DPD/CFR is not required or if designer has their own DPD/CFR and only needs the transceiver to complete their design.

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
12개 모두 보기
유형 직함 날짜
* Data sheet AFE77xxDQuad/Dual-Channel RF Transceiver With Dual Feedback Paths Integrating CFR/DPD datasheet (Rev. A) PDF | HTML 2023/10/12
Certificate AFE7769D-MBEVM EU Declaration of Conformity (DoC) 2024/10/14
Application brief AFE77xxD BSDL Guidelines PDF | HTML 2024/09/24
Application brief The Future of Fixed Wireless Access PDF | HTML 2024/08/08
Certificate AFE7769D-18EVM EU Declaration of Conformity (DoC) 2024/01/31
Certificate AFE7769D-21EVM EU Declaration of Conformity (DoC) 2024/01/31
Certificate AFE7769D-26EVM EU Declaration of Conformity (DoC) 2024/01/31
Certificate AFE7769D-49EVM EU Declaration of Conformity (DoC) 2024/01/31
Certificate AFE7769D-LBEVM EU Declaration of Conformity (DoC) 2024/01/31
User guide Programming AFE7769D to Interface With PC802 for 2T2R PDF | HTML 2023/12/04
Product overview PCM-3P-PC802 LTE and 5G O-RAN Small Cell Outdoor Radio Design Overview 2023/10/09
User guide Interfacing AFE7769DEVM With the Hitek Agilex eSOM7 FPGA PDF | HTML 2023/09/28

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

AFE7769DEVM — 듀얼 피드백 경로 및 CFR/DPD를 사용하는 쿼드 채널 RF 트랜시버용 AFE7769D 평가 모듈입니다

AFE7769D 평가 모듈(EVM)은 AFE7769D 통합 무선 주파수(RF) 트랜시버를 위한 개발 플랫폼입니다. AFE7769D는 고성능, 멀티 채널, 4전송, 4수신, 2피드백(4T4R2FB) 트랜시버입니다. 저전력 디지털 전치 왜곡(DPD) 엔진과 전력 증폭기(PA) 선형화 및 피크 대 평균(PAR) 감소를 위한 파고율 감소(CFR)가 통합되어 있습니다.

트랜스미터 및 리시버 체인의 높은 동적 범위를 통해 무선 기지국은 600MHz ~ 6GHz의 RF 범위로 2G, 3G, 4G 및 5G 신호를 생성하고 수신할 수 있습니다. (...)

TI.com에서 구매 불가
개발 키트

PCM-3P-PC802 — AFE77xxD용 Picocom PC802 5G 소형 셀 PHY SoC

PC802는 5GNR/LTE 소형 셀 분리 및 통합 RAN 아키텍처를 위해 특별히 설계된 PHY SoC입니다. 이 플랫폼은 저 PHY 기능을 가진 Picocom의 분할 7.2 무선 장치(O-RU)용 PC802를 사용한 TI AFE77xxD의 원활한 상호 작용과 평가를 위해 설계되었습니다. SoC는 PCIe를 사용한 SCF FAPI 인터페이스를 통해 계층 2/3 스택과 상호 작용합니다. PC802는 O-RAN Open Fronthaul eCPRI 인터페이스를 통한 무선 장치(O-RU)와의 상호 작용 또는 표준화된 JESD204B (...)
발송: Picocom
사용 설명서: PDF | HTML
옵션 다운로드
소프트웨어 개발 키트(SDK)

PCM-3P-PC802 PCM-3P-PC802 reference design

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

제품
통합 정밀 ADC 및 DAC
AFE10004 EEPROM 및 출력 스위치를 지원하는 4채널 전원 증폭기 모니터 및 컨트롤러
RF FDA
LMH9135 발룬 기능이 통합된 3.2~4.2GHz 차동-단일 종단 증폭기
Arm 기반 프로세서
AM6412 듀얼 코어 64비트 ARM® Cortex®-A53, 싱글 코어 Cortex-R5F, PCIe, USB 3.0 및 보안
RF 샘플링 트랜시버
AFE7728D 듀얼 피드백 경로와 일체형 CFR/DPD - 200MHz를 지원하는 듀얼 채널 RF 트랜시버 AFE7768D 듀얼 피드백 경로와 일체형 CFR/DPD - 200MHz를 지원하는 4채널 RF 트랜시버 AFE7769D 듀얼 피드백 경로와 일체형 CFR/DPD를 지원하는 쿼드 채널 RF 트랜시버
CAD/CAE 기호

AFE7769D-35EVM Design Package

SBAR022.ZIP (24729 KB)
패키지 CAD 기호, 풋프린트 및 3D 모델
FCBGA (ABJ) 400 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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