THS6032

활성

저전력, 듀얼 클래스 G 증폭기 및 DSL/PLC 라인 드라이버

제품 상세 정보

Number of channels 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 32 BW at Acl (MHz) 100 Acl, min spec gain (V/V) 1 Vn at flatband (typ) (nV√Hz) 2.4 Vn at 1 kHz (typ) (nV√Hz) 2.8 Iq per channel (typ) (mA) 8.3 Vos (offset voltage at 25°C) (max) (mV) 5 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 72 Input bias current (max) (pA) 9000000 Offset drift (typ) (µV/°C) 10 GBW (typ) (MHz) 100 Iout (typ) (mA) 440 2nd harmonic (dBc) 79 3rd harmonic (dBc) 68 Frequency of harmonic distortion measurement (MHz) 1
Number of channels 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 32 BW at Acl (MHz) 100 Acl, min spec gain (V/V) 1 Vn at flatband (typ) (nV√Hz) 2.4 Vn at 1 kHz (typ) (nV√Hz) 2.8 Iq per channel (typ) (mA) 8.3 Vos (offset voltage at 25°C) (max) (mV) 5 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 72 Input bias current (max) (pA) 9000000 Offset drift (typ) (µV/°C) 10 GBW (typ) (MHz) 100 Iout (typ) (mA) 440 2nd harmonic (dBc) 79 3rd harmonic (dBc) 68 Frequency of harmonic distortion measurement (MHz) 1
HSOIC (DWP) 20 133.444125 mm² 12.825 x 10.405
  • Low-Power ADSL Line Driver Ideal for Central Office
    • 1.35-W Total Power Dissipation for Full-Rate ADSL Into a 25- Load
  • Low-Impedance Shutdown Mode
    • Allows Reception of Incoming Signal During Standby
  • Two Modes of Operation
    • Class-G Mode: 4 Power Supplies, 1.35 W Power Dissipation
    • Class-AB Mode: 2 Power Supplies, 2 W Power Dissipation
  • Low Distortion
    • THD = –62 dBc at f = 1 MHz, VO(PP) = 20 V, 25- Load
    • THD = –69 dBc at f = 1 MHz, VO(PP) = 2 V, 25- Load
  • 400-mA Minimum Output Current Into a 25- Load
  • High-Speed:
    • 65-MHz Bandwidth (–3dB) , 25-Load
    • 100-MHz Bandwidth (–3dB) , 100- Load
    • 1200-V/µs Slew Rate
  • Thermal Shutdown and Short-Circuit Protection
  • Evaluation Module Available

All trademarks are the property of their respective owners.

  • Low-Power ADSL Line Driver Ideal for Central Office
    • 1.35-W Total Power Dissipation for Full-Rate ADSL Into a 25- Load
  • Low-Impedance Shutdown Mode
    • Allows Reception of Incoming Signal During Standby
  • Two Modes of Operation
    • Class-G Mode: 4 Power Supplies, 1.35 W Power Dissipation
    • Class-AB Mode: 2 Power Supplies, 2 W Power Dissipation
  • Low Distortion
    • THD = –62 dBc at f = 1 MHz, VO(PP) = 20 V, 25- Load
    • THD = –69 dBc at f = 1 MHz, VO(PP) = 2 V, 25- Load
  • 400-mA Minimum Output Current Into a 25- Load
  • High-Speed:
    • 65-MHz Bandwidth (–3dB) , 25-Load
    • 100-MHz Bandwidth (–3dB) , 100- Load
    • 1200-V/µs Slew Rate
  • Thermal Shutdown and Short-Circuit Protection
  • Evaluation Module Available

All trademarks are the property of their respective owners.

The THS6032 is a low-power line driver ideal for asymmetrical digital subscriber line (ADSL) applications. This device contains two high-current, high-speed current-feedback drivers, which can be configured differentially for driving ADSL signals at the central office. The THS6032 features a unique class-G architecture to lower power consumption to 1.35 W. The THS6032 can also be operated in a traditional class-AB mode to reduce the number of power supplies to two.

The class-G architecture supplies current to the load from four supplies. For low output voltages (typically –2.5 < VO < +2.5), some of the output current is supplied from the +VCC(L) and –VCC(L) supplies (typically ±5 V). For large output voltages (typically VO < –2.5 and VO > +2.5), the output current is supplied from +VCC(H) and –VCC(H) (typically ±15 V). This current sharing between VCC(L) and VCC(H) minimizes power dissipation within the THS6032 output stages for high crest factor ADSL signals.

The THS6032 features a low-impedance shutdown mode, which allows the central office to receive incoming calls even after the device has been shut down. The THS6032 is available packaged in the patented PowerPAD package. This package provides outstanding thermal characteristics in a small-footprint surface-mount package, which is fully compatible with automated surface-mount assembly procedures. It is also available in the new MicroStar Junior BGA package. This package is only 25 mm2 in area, allowing for high-density PCB designs.

Shutdown (SHDN1 and SHDN2) allows for powering down the internal circuitry for power conservation or for multiplexing. Separate shutdown controls are available for each channel on the THS6032. The control levels are TTL compatible. When turned off, each driver output is placed in a low impedance state which is determined by the voltage at DGND. This virtual ground at the outputs allows proper termination of a transmission line.

The THS6032 is a low-power line driver ideal for asymmetrical digital subscriber line (ADSL) applications. This device contains two high-current, high-speed current-feedback drivers, which can be configured differentially for driving ADSL signals at the central office. The THS6032 features a unique class-G architecture to lower power consumption to 1.35 W. The THS6032 can also be operated in a traditional class-AB mode to reduce the number of power supplies to two.

The class-G architecture supplies current to the load from four supplies. For low output voltages (typically –2.5 < VO < +2.5), some of the output current is supplied from the +VCC(L) and –VCC(L) supplies (typically ±5 V). For large output voltages (typically VO < –2.5 and VO > +2.5), the output current is supplied from +VCC(H) and –VCC(H) (typically ±15 V). This current sharing between VCC(L) and VCC(H) minimizes power dissipation within the THS6032 output stages for high crest factor ADSL signals.

The THS6032 features a low-impedance shutdown mode, which allows the central office to receive incoming calls even after the device has been shut down. The THS6032 is available packaged in the patented PowerPAD package. This package provides outstanding thermal characteristics in a small-footprint surface-mount package, which is fully compatible with automated surface-mount assembly procedures. It is also available in the new MicroStar Junior BGA package. This package is only 25 mm2 in area, allowing for high-density PCB designs.

Shutdown (SHDN1 and SHDN2) allows for powering down the internal circuitry for power conservation or for multiplexing. Separate shutdown controls are available for each channel on the THS6032. The control levels are TTL compatible. When turned off, each driver output is placed in a low impedance state which is determined by the voltage at DGND. This virtual ground at the outputs allows proper termination of a transmission line.

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
THS6222 활성 공통 모드 버퍼를 지원하는 차동 광대역 PLC 및 HPLC 라인 드라이버 Single port line driver for power line communication and DSL applications

기술 문서

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모두 보기5
유형 직함 날짜
* Data sheet Low-Power ADSL Central-Office Line Driver datasheet (Rev. F) 2009/08/25
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017/03/28
User guide THS6032 Low-Power ADSL Central-Office Line Driver Evaluation Module (Rev. A) 2008/08/29
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005/01/17
Application note Active Output Impedance for ADSL Line Drivers 2002/11/26

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

시뮬레이션 모델

THS6032 PSpice Model (Rev. B)

SLOJ026B.ZIP (59 KB) - PSpice Model
시뮬레이션 모델

THS6032 TINA-TI Reference Design (Rev. B)

SLAC103B.TSC (108 KB) - TINA-TI Reference Design
시뮬레이션 모델

THS6032 TINA-TI Spice Model (Rev. A)

SLAM032A.ZIP (5 KB) - TINA-TI Spice Model
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
시뮬레이션 툴

TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
패키지 다운로드
HSOIC (DWP) 20 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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