DAC5688
- Dual, 16-Bit, 800 MSPS DACs
- Dual, 16-Bit, 250 MSPS CMOS Input Data
- 16 Sample Input FIFO
- Flexible input data bus options
- High Performance
- 81 dBc ACLR WCDMA TM1 at 70 MHz
- 2x-32x Clock Multiplying PLL/VCO
- Selectable 2x–8x Interpolation Filters
- Stop-band Attenuation > 80 dB
- Complex Mixer with 32-Bit NCO
- Digital Quadrature Modulator Correction
- Gain, Phase and Offset Correction
- Digital Inverse SINC Filter
- 3- or 4-Wire Serial Control Interface
- On Chip 1.2-V Reference
- Differential Scalable Output: 2 to 20 mA
- Package: 64-pin 9×9mm QFN
- APPLICATIONS
- Cellular Base Stations
- Broadband Wireless Access (BWA)
- WiMAX 802.16
- Fixed Wireless Backhaul
- Cable Modem Termination System (CMTS)
The DAC5688 is a dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with dual CMOS digital data bus, integrated 2x-8x interpolation filters, a fine frequency mixer with 32-bit complex numerically controlled oscillator (NCO), on-board clock multiplier, IQ compensation, and internal voltage reference. Different modes of operation enable or bypass various signal processing blocks. The DAC5688 offers superior linearity, noise, crosstalk and PLL phase noise performance.
The DAC5688 dual CMOS data bus provides 250 MSPS input data transfer per DAC channel. Several input data options are available: dual-bus data, single-bus interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock to ease interface timing. Input data can interpolated 2x, 4x or 8x by on-board digital interpolating FIR filters with over 80 dB of stop-band attenuation.
The DAC5688 allows both complex or real output. An optional 32-bit NCO/mixer in complex mode provides frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. A digital Inverse SINC filter compensates for natural DAC sin(x)/x frequency roll-off. The digital Quadrature Modulator Correction (QMC) feature allows IQ compensation of phase, gain and offset to maximize sideband rejection and minimize LO feed-through of an external quadrature modulator performing the final single sideband RF up-conversion.
The DAC5688 is pin compatible with the DAC5689 which does not include a clock-multiplying PLL. The DAC5688 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin 9x9mm QFN package.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | 16-Bit, 800 MSPS 2x–8x Interpolating Dual-Channel Digital-to-Analog Converter (D datasheet (Rev. C) | 2010年 8月 19日 | |
Analog Design Journal | Q3 2009 Issue Analog Applications Journal | 2018年 9月 24日 | ||
EVM User's guide | DAC5668/88/89 EVM (Rev. A) | 2010年 3月 19日 | ||
Analog Design Journal | Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs | 2009年 7月 14日 | ||
Application note | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009年 4月 28日 | ||
Application note | Passive Terminations for Current Output DACs | 2008年 11月 10日 | ||
EVM User's guide | TSW4100EVM User's Guide (Rev. A) | 2008年 9月 16日 | ||
Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008年 6月 8日 | ||
Application note | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008年 6月 2日 |
設計與開發
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DAC5688EVM — DAC5688 評估模組
The DAC5688EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x/4x/8x interpolation filters, on-board clock multiplier and PLL, 32-bit NCO and (...)
SLLC420 — TSW3100EVM GUI v2.7
支援產品和硬體
產品
高速 DAC (>10 MSPS)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
VQFN (RGC) | 64 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。