DS08MB200

現行

雙 800-Mbps 2:1/1:2 LVDS 多工器/緩衝器

產品詳細資料

Function Mux buffer Protocols BLVDS, CML, LVDS, LVPECL Number of transmitters 2, 4 Number of receivers 2, 4 Signaling rate (Mbps) 800 Input signal BLVDS, CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Mux buffer Protocols BLVDS, CML, LVDS, LVPECL Number of transmitters 2, 4 Number of receivers 2, 4 Signaling rate (Mbps) 800 Input signal BLVDS, CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WQFN (RHS) 48 49 mm² (7 mm × 7 mm)
  • Up to 800 Mbps Data Rate per Channel
  • LVDS/BLVDS/CML/LVPECL Compatible Inputs, LVDS Compatible Outputs
  • Low Output Skew and Jitter
  • On-Chip 100Ω Input Termination
  • 15 kV ESD Protection on LVDS Inputs/Outputs
  • Hot Plug Protection
  • Single 3.3V Supply
  • Industrial –40 to +85°C Temperature Range
  • 48-pin WQFN Package

All trademarks are the property of their respective owners.

  • Up to 800 Mbps Data Rate per Channel
  • LVDS/BLVDS/CML/LVPECL Compatible Inputs, LVDS Compatible Outputs
  • Low Output Skew and Jitter
  • On-Chip 100Ω Input Termination
  • 15 kV ESD Protection on LVDS Inputs/Outputs
  • Hot Plug Protection
  • Single 3.3V Supply
  • Industrial –40 to +85°C Temperature Range
  • 48-pin WQFN Package

All trademarks are the property of their respective owners.

The DS08MB200 is a dual-port 1 to 2 repeater/buffer and 2 to 1 multiplexer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout. The differential inputs and outputs interface to LVDS or Bus LVDS signals such as those on TI’s 10-, 16-, and 18- bit Bus LVDS SerDes, or to CML or LVPECL signals.

The 3.3V supply, CMOS process, and robust I/O ensure high performance at low power over the entire industrial –40 to +85°C temperature range.

The DS08MB200 is a dual-port 1 to 2 repeater/buffer and 2 to 1 multiplexer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout. The differential inputs and outputs interface to LVDS or Bus LVDS signals such as those on TI’s 10-, 16-, and 18- bit Bus LVDS SerDes, or to CML or LVPECL signals.

The 3.3V supply, CMOS process, and robust I/O ensure high performance at low power over the entire industrial –40 to +85°C temperature range.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 DS08MB200 Dual 800 Mbps 2:1/1:2 LVDS Mux/Buffer datasheet (Rev. D) 2013/4/6

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模擬型號

DS08MB200 IBIS Model

SNLM088.ZIP (12 KB) - IBIS 模型
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (RHS) 48 Ultra Librarian

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