DS32EV100
- Equalizes Up to 14 dB loss at 3.2 Gbps
- 8 levels of Programmable Equalization
- Operates up to 3.2 Gbps with 40” FR4 Traces
- 0.12 UI Residual Deterministic Jitter at 3.2 Gbps with 40” FR4 Traces
- Single 2.5V or 3.3V Power Supply
- Supports AC or DC-Coupling with Wide Input Common-Mode
- Low power Consumption: 100 mW Typ at 2.5V
- Small 3 mm x 4 mm 14-pin WSON Package
- > 8 kV HBM ESD Rating
- -40 to 85°C Operating Temperature Range
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The DS32EV100 programmable equalizer provides compensation for transmission medium losses and reduces the medium-induced deterministic jitter for NRZ data channel. The DS32EV100 is optimized for operation up to 3.2 Gbps for both cables and FR4 traces. The equalizer channel has eight levels of input equalization that can be programmed by three control pins.
The equalizer supports both AC and DC-coupled data paths for long run length data patterns such as PRBS-31, and balanced codes such as 8b/10b. The device uses differential current-mode logic (CML) inputs and outputs. The DS32EV100 is available in a 3 mm x 4 mm 14-pin WSON package. Power is supplied from either a 2.5V or 3.3V supply.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS32EV100 Programmable Single Equalizer datasheet (Rev. D) | 2013年 2月 19日 | |
| User guide | DS32EV100-EVK User Guide DS32EV100 Programmable Equalizer | 2012年 2月 20日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WSON (NHK) | 14 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。