DS96F173MQML
- Meets EIA-485, EIA-422A, EIA-423A Standards
- Designed for Multipoint Bus Applications
- TRI-STATE Outputs
- Common Mode Input Voltage Range: −7V to +12V
- Operates from Single +5.0V Supply
- Lower Power Version
- Input Sensitivity of ±200 mV Over Common Mode Range
- Input Hysteresis of 50 mV Typical
- High Input Impedance
- DS96F173 and DS96F175 are Lead and Function Compatible with SN75173/175 or the AM26LS32/MC3486
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The DS96F173 and the DS96F175 are high speed quad differential line receivers designed to meet the EIA-485 standard. The DS96F173 and the DS96F175 offer improved performance due to the use of L-FAST bipolar technology. The use of LFAST technology allows the DS96F173 and DS96F175 to operate at higher speeds while minimizing power consumption.
The DS96F173 and the DS96F175 have TRI-STATE outputs and are optimized for balanced multipoint data bus transmission at rates up to 15 Mbps. The receivers feature high input impedance, input hysteresis for increased noise immunity, and input sensitivity of 200 mV over a common mode input voltage range of −7V to +12V. The receivers are therefore suitable for multipoint applications in noisy environments. The DS96F173 features an active high and active low Enable, common to all four receivers. The DS96F175 features separate active high Enables for each receiver pair.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | DS96F173MQML/DS96F175MQML EIA-485/EIA-422 Quad Differential Receivers datasheet (Rev. A) | 2013年 4月 18日 | |
* | SMD | DS96F173MQML SMD 5962-90766 | 2016年 6月 21日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
CDIP (NFE) | 16 | Ultra Librarian |
LCCC (NAJ) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
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