SN65ELT20

現行

5V TTL 至差動 PECL 轉換器

產品詳細資料

Function Driver, Translator Protocols PECL Number of transmitters 1 Number of receivers 0 Supply voltage (V) 5 Signaling rate (MBits) 860 Input signal TTL Output signal PECL Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver, Translator Protocols PECL Number of transmitters 1 Number of receivers 0 Supply voltage (V) 5 Signaling rate (MBits) 860 Input signal TTL Output signal PECL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • 1.25-ns Maximum Propagation Delay
  • Operating Range: VCC = 4.2 V to 5.7 V With GND = 0 V
  • Flow-Through Pinout Enables Easy Layout
  • Built-In Temperature Compensation
  • Drop-In Compatible With MC10ELT20, MC100ELT20
  • 1.25-ns Maximum Propagation Delay
  • Operating Range: VCC = 4.2 V to 5.7 V With GND = 0 V
  • Flow-Through Pinout Enables Easy Layout
  • Built-In Temperature Compensation
  • Drop-In Compatible With MC10ELT20, MC100ELT20

The SN65ELT20 is a TTL-to-differential PECL translator. It operates on a 5-V supply and ground only. The output is undetermined when the inputs are left floating. The low output skew makes the device an ideal solution for clock or data signal translation.

The SN65ELT20 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.

The SN65ELT20 is a TTL-to-differential PECL translator. It operates on a 5-V supply and ground only. The output is undetermined when the inputs are left floating. The low output skew makes the device an ideal solution for clock or data signal translation.

The SN65ELT20 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 2
類型 標題 日期
* Data sheet 5 V TTL to Differential PECL Translator datasheet (Rev. A) 2012年 3月 8日
Application note AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) 2007年 10月 17日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 引腳 下載
SOIC (D) 8 檢視選項
VSSOP (DGK) 8 檢視選項

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片