TPS28226
- Drives Two N-Channel MOSFETs with 14-ns Adaptive Dead Time
- Wide Gate Drive Voltage: 4.5 V Up to 8.8 V With Best Efficiency at 7 V to 8 V
- Wide Power System Train Input Voltage: 3 V Up to 27 V
- Wide Input PWM Signals: 2.0 V up to 13.2-V Amplitude
- Capable to Drive MOSFETs with ≥40-A Current per Phase
- High Frequency Operation: 14-ns Propagation Delay and 10-ns Rise/Fall Time Allow FSW – 2 MHz
- Capable to Propagate <30-ns Input PWM Pulses
- Low-Side Driver Sink On-Resistance (0.4 Ω) Prevents dV/dT Related Shoot-Through Current
- 3-State PWM Input for Power Stage Shutdown
- Space Saving Enable (Input) and Power Good (Output) Signals on Same Pin
- Thermal Shutdown
- UVLO Protection
- Internal Bootstrap Diode
- Economical SOIC-8 and Thermally Enhanced 3-mm x 3-mm DFN-8 Packages
- High Performance Replacement for Popular 3-State Input Drivers
The is a high-speed driver for N-channel complimentary driven power MOSFETs with adaptive dead-time control. This driver is optimized for use in variety of high-current one and multi-phase DC-to-DC converters. The is a solution that provides high efficiency, small size and low EMI emissions.
The efficiency is achieved by up to 8.8-V gate drive voltage, 14-ns adaptive dead-time control, 14-ns propagation delays and high-current 2-A source and 4-A sink drive capability. The 0.4-Ω impedance for the lower gate driver holds the gate of power MOSFET below its threshold and ensures no shoot-through current at high dV/dt phase node transitions. The bootstrap capacitor charged by an internal diode allows use of N-channel MOSFETs in a half-bridge configuration.
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技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS28226 High-Frequency 4-A Sink Synchronous MOSFET Drivers datasheet (Rev. A) | PDF | HTML | 2014年 11月 26日 |
| Application note | Using Half-Bridge Gate Driver to Achieve 100% Duty Cycle for High Side FET | PDF | HTML | 2024年 3月 25日 | |
| Application note | Bootstrap Circuitry Selection for Half Bridge Configurations (Rev. A) | PDF | HTML | 2023年 9月 8日 | |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020年 2月 28日 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020年 2月 28日 | ||
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 2018年 10月 29日 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
| More literature | Power Loss Calculation for Sync Buck Converter | 2007年 2月 14日 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
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訂購與品質
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- 認證摘要
- 進行中持續性的可靠性監測
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