TPS3840
- Wide operating voltage: 1.5 V to 10 V
- Nano supply current: 300 nA (Typ), 700 nA (Max)
- Fixed threshold voltage (VIT-)
- Threshold from 1.6 V to 4.9 V in 0.1-V steps
- High accuracy: 1% (Typ), 1.5% (Max)
- Built-in hysteresis (VIT+)
- 1.6 V < VIT- ≤ 3.0 V = 100 mV (Typical)
- 3.1 V ≤ VIT- < 4.9 V = 200 mV (Typical)
- Start-up delay (tSTRT): 220 µs (Typ), 350 µs (Max)
- Programmable reset time delay (tD):
- 50 µs (no capacitor) to 6.2 s (10-µF)
- Active-low manual reset (MR)
- Three output topologies:
- TPS3840DL: open-drain, active-low (RESET), requires pull-up resistor
- TPS3840PL: push-pull, active-low (RESET)
- TPS3840PH: push-pull, active-high (RESET)
- Wide temperature range: –40°C to +125°C
- Package: SOT23-5 (DBV)
Wide Vin allows monitoring 9V rails or batteries without external components and 24V rails with external resistors. Nano-Iq extends battery life for low power applications and minimizes current consumption when using external resistors. Fast start-up delay allows the detection of a voltage fault before the rest of the system powers up providing maximum safety in hazardous start-up fault conditions. Low Power-on-Reset (VPOR) prevents false resets, premature enable or turn-on of next device, and proper transistor control during power-up and power-down.
Reset output signal is asserted when the voltage at VDD drops below the negative voltage threshold (VIT-) or when manual reset (MR) is pulled to a low logic (VMR_L). Reset signal is cleared when VDD rise above VIT- plus hysteresis (VIT+) and manual reset is floating or above VMR_H and the reset time delay (tD) expires. Reset time delay can be programmed by connecting a capacitor between CT pin and ground. For a fast reset CT pin can be left floating.
Additional features: Built-in glitch immunity protection for MR and VDD, built-in hysteresis, low open-drain output leakage current (ILKG(OD)).
技術文件
設計與開發
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TPS3840EVM — TPS3840 奈米功率高輸入電壓監控器評估模組
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。
在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
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TIDA-010243 — 具備獨立 ADC 的三相比流器電表參考設計
TIDA-010041 — 用作比較器或電源序列器的奈米功率、寬 VIN (最大 12 V) 監控器參考設計
TIDA-010055 — 非隔離電源架構,具有用於保護繼電器模組的診斷參考設計
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOT-23 (DBV) | 5 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點