開發模組 (EVM) 的 GUI
UCD-POWER-SEQUENCER-STUDIO — Configure the UCD91XXX device family using the UCD Power Sequencer Studio
Graphical environment for configuring, storing, and monitoring parameters for the UCD91xxx sequencer family
UCD91320
- Sequence and monitor up to 24 analog or digital (power good) rails + 8 digital only rails
- PWM margining on up to 16 rails
- Cascade up to 4 devices to sequence up to 128 rails
- Active trim function allows user to trim output voltage
- Monitor and respond to OV, UV, time-out, and GPI-triggered faults
- Flexible sequencing dependencies, delay times, Boolean logic, and GPIO configurations
- Rail status dependent sequencing, delay times, and LGPO pins for complex sequencing applications
- Four rail profiles for adaptive voltage identification (AVID) voltage regulator
- Nonvolatile fault event logging with RTC and timestamping
- Single-event fault log (100 entries)
-
Black box fault log saves fault information and status of all rails - for the first fault and the last fault before a power down event
- Continue monitoring rails during configuration activities to maximize up-time
- Programmable watchdog timer and system reset
- GPI Controlled Rail Groups
- SEU mitigation & ECC (single-error correct + double-error detect)
- PMBus™ 1.2 compliant
-
PMBus security profile Level 0 with custom commands to enable features in security profile Level 2
The UCD91320 device is a 32-rail PMBus controlled power sequencer.
Dedicated pins (MONx) monitor up to 32 voltage rails in either analog or digital modes. 32 rail enable (ENx) pins allow regulators to be sequenced. 16 margining (MARx) pins can be used to push regulators to high or low limits (margins) for testing, or actively trim outputs for enhanced accuracy. The output state of 16 logical GPO (LGPOx) pins can be controlled by the state of GPIs, rail status, and other LGPOs.
Nonvolatile event logging preserves fault events after power dropout. The Black Box Fault Log preserves the fault information and the status of all rails. This occurs for the first fault as well as the last fault before a power down event. The cascading feature offers convenient ways to manage up to 128 voltage rails.
The Sequencer Studio™ software is an intuitive PC-based graphic user interface (GUI) that can configure, store, and monitor all system operating parameters.
The UCD91xxx devices utilize multiple security safeguards to maintain integrity of the device firmware and configuration. Because of this, TI may not be able to read out the device configuration and firmware during failure analysis or in the case of a return. Please keep record of the firmware version running on your device, as well as the configuration parameters in the device. This ensures that the TI team is able to replicate any conditions for a return.
技術文件
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檢視所有 3 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | UCD91320 32-Rail PMBus™ Power Sequencer and System Manager datasheet | PDF | HTML | 2025年 12月 18日 |
| User guide | UCD91xxx Sequencer and System Health Controller PMBus™ Command Reference | PDF | HTML | 2025年 12月 10日 | |
| Application note | Design Voltage Margining Circuit for UCD91xxx Power Sequencer and System Manager | PDF | HTML | 2025年 9月 16日 |
設計與開發
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模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。
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在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。
在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| LQFP (PZ) | 100 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點