SPRSP14D May 2019 – February 2021 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S
The following reset sources exist on this device: XRSn, WDRSn, NMIWDRSn, SYSRSn, SCCRESET, ECAT_RESET_OUT, SIMRESET_XRSn, and SIMRESET_CPU1RSn. See the Reset Signals table in the System Control chapter of the TMS320F2838x Real-Time Microcontrollers Technical Reference Manual.
The parameter th(boot-mode) must account for a reset initiated from any of these sources.
Some reset sources are internally driven by the device. Some of these sources will drive XRSn low. Use this to disable any other devices driving the boot pins. The SCCRESET and debugger reset sources do not drive XRSn; therefore, the pins used for boot mode should not be actively driven by other devices in the system. The boot configuration has a provision for changing the boot pins in OTP; for more details, see the TMS320F2838x Real-Time Microcontrollers Technical Reference Manual.