SLUA963B June   2020  – October 2022 UCC21710-Q1 , UCC21732-Q1 , UCC5870-Q1

 

  1.   HEV/EV Traction Inverter Design Guide Using Isolated IGBT and SiC Gate Drivers
  2. 1Introduction
  3. 2HEV/EV Overview
    1. 2.1 HEV/EV Architectures
    2. 2.2 HEV/EV Traction Inverter System Architecture
    3. 2.3 HEV/EV Traction Inverter System Performance Impact
  4. 3Design of HEV/EV Traction Inverter Drive Stage
    1. 3.1  Introduction to UCC217xx-Q1
    2. 3.2  Designing a Traction Inverter Drive System Using UCC217xx-Q1
    3. 3.3  Description of Protection Features
    4. 3.4  Protection Features of UCC217xx-Q1
    5. 3.5  UCC217xx-Q1 Protection and Monitoring Features Descriptions
      1. 3.5.1 Primary and Secondary Side UVLO and OVLO
      2. 3.5.2 Over-Current (OC) and Desaturation (DESAT) Detection
      3. 3.5.3 2-Level and Soft Turn-Off
      4. 3.5.4 Power Switch Gate Voltage (VGE/VGS) Monitoring
      5. 3.5.5 Power Switch Anti-Shoot-Through
      6. 3.5.6 Integrated Internal or External Miller Clamp
      7. 3.5.7 Isolated Analog-to-PWM Channel
      8. 3.5.8 Short-Circuit Clamping
      9. 3.5.9 Active Pulldown
    6. 3.6  Introduction to UCC5870-Q1
    7. 3.7  Designing a Traction Inverter Drive System Using UCC5870-Q1
    8. 3.8  Description of Protection Features
    9. 3.9  Protection Features of UCC5870-Q1
    10. 3.10 UCC5870-Q1 Protection and Monitoring Features Descriptions
      1. 3.10.1  Primary and Secondary Side UVLO and OVLO
      2. 3.10.2  Programmable Desaturation (DESAT) Detection and Over-Current (OC)
      3. 3.10.3  Adjustable 2-Level or Soft Turn-Off
      4. 3.10.4  Active High-Voltage Clamp
      5. 3.10.5  Power Switch Gate Voltage (VGE/VGS) Monitoring
      6. 3.10.6  Gate Threshold Voltage Monitor
      7. 3.10.7  Power Switch Anti-Shoot-Through
      8. 3.10.8  Active Short Circuit (ASC)
      9. 3.10.9  Integrated Internal or External Miller Clamp
      10. 3.10.10 Isolated Analog-to-Digital Converter
        1. 3.10.10.1 Temperature Monitoring of Power Transistor
      11. 3.10.11 Short-Circuit Clamping
      12. 3.10.12 Active and Passive Pulldown
      13. 3.10.13 Thermal Shutdown and Temperature Warning of Driver IC
      14. 3.10.14 Clock Monitor and CRC
      15. 3.10.15 SPI and Register Data Protection
  5. 4Isolated Bias Supply Architecture
  6. 5Summary
  7. 6References
  8. 7Revision History

3.9 Protection Features of UCC5870-Q1

The risk of latent and single-point failures can be reduced through gate driver integrated features as previously show in Table 3-1 with the UCC217xx-Q1 family. Both integrated and auxiliary circuits were outlined as ways to enable better coverage of failure modes. Table 3-2 shows the potential failure modes associated with the gate driver, the potential system impact and the UCC5870-Q1 integrated features. In this case, every key gate driver feature used to mitigate failure modes are integrated into the driver, versus externally implemented.

The system block visualization of the failure location(s) is shown in Figure 3-16 where (F1) is PMIC failure, (F2) is MCU failure, (F3) is Driver failure, and (F4) is Motor/Mechanical failure.

Table 3-2 Protection and Diagnostic Features Using UCC5870-Q1
System impactAssociated driver and/or inverter failuresPotential failure location(s)UCC5870-Q1 integrated featuresExternal circuit features
Torque disturbanceOver or under voltage of driver power supplyF1UVLO, OVLO + interrupt signalN/A
Unintended commutationGate driver pulse width skewF2 or F3Low-delay capacitive isolation barrier and proven process
Clock and data transmission monitoring
ASC control of output in case of MCU failure		N/A
Unintended motor shutdown / Torque disturbancePower switch short circuitF2 or F4DESAT/OC detection and interrupt
DESAT/OC self-test		N/A
Unintended motor shutdown / Torque disturbanceGate shorted to ground or VDDF2 or F3VGE monitoring and compare to PWM with interruptN/A
Unintended motor shutdownPower switch shoot-through due to false gate signal or dv/dt-induced currentF2Anti-shoot-through logic and Miller clamp (internal or external)N/A
Torque disturbancePower switch over-voltageF2Two-level turn-off and/or soft turn-off
VCE/VDS monitoring using ADC
VCE Clamp		N/A
Torque disturbancePower switch over-temperatureF1, F2, or F4Integrated ADC with biasing currentN/A
Torque disturbancePower switch gate oxide breakdownF2 or F4Short circuit clampingN/A
Torque disturbancePower switch false turn-on when input power is floatingF1 or F2Active pulldownN/A
Torque disturbance / Unintended motor shutdownPower system DC bus over/under voltageF1 or F4Integrated ADCN/A
GUID-49E1735D-71AB-4D65-A3AE-D2A74EBF2A78-low.gifFigure 3-16 Possible Traction Inverter System-Level Failures and Prevention Circuits Using UCC5870-Q1