SLUA963B June   2020  – October 2022 UCC21710-Q1 , UCC21732-Q1 , UCC5870-Q1

 

  1.   HEV/EV Traction Inverter Design Guide Using Isolated IGBT and SiC Gate Drivers
  2. 1Introduction
  3. 2HEV/EV Overview
    1. 2.1 HEV/EV Architectures
    2. 2.2 HEV/EV Traction Inverter System Architecture
    3. 2.3 HEV/EV Traction Inverter System Performance Impact
  4. 3Design of HEV/EV Traction Inverter Drive Stage
    1. 3.1  Introduction to UCC217xx-Q1
    2. 3.2  Designing a Traction Inverter Drive System Using UCC217xx-Q1
    3. 3.3  Description of Protection Features
    4. 3.4  Protection Features of UCC217xx-Q1
    5. 3.5  UCC217xx-Q1 Protection and Monitoring Features Descriptions
      1. 3.5.1 Primary and Secondary Side UVLO and OVLO
      2. 3.5.2 Over-Current (OC) and Desaturation (DESAT) Detection
      3. 3.5.3 2-Level and Soft Turn-Off
      4. 3.5.4 Power Switch Gate Voltage (VGE/VGS) Monitoring
      5. 3.5.5 Power Switch Anti-Shoot-Through
      6. 3.5.6 Integrated Internal or External Miller Clamp
      7. 3.5.7 Isolated Analog-to-PWM Channel
      8. 3.5.8 Short-Circuit Clamping
      9. 3.5.9 Active Pulldown
    6. 3.6  Introduction to UCC5870-Q1
    7. 3.7  Designing a Traction Inverter Drive System Using UCC5870-Q1
    8. 3.8  Description of Protection Features
    9. 3.9  Protection Features of UCC5870-Q1
    10. 3.10 UCC5870-Q1 Protection and Monitoring Features Descriptions
      1. 3.10.1  Primary and Secondary Side UVLO and OVLO
      2. 3.10.2  Programmable Desaturation (DESAT) Detection and Over-Current (OC)
      3. 3.10.3  Adjustable 2-Level or Soft Turn-Off
      4. 3.10.4  Active High-Voltage Clamp
      5. 3.10.5  Power Switch Gate Voltage (VGE/VGS) Monitoring
      6. 3.10.6  Gate Threshold Voltage Monitor
      7. 3.10.7  Power Switch Anti-Shoot-Through
      8. 3.10.8  Active Short Circuit (ASC)
      9. 3.10.9  Integrated Internal or External Miller Clamp
      10. 3.10.10 Isolated Analog-to-Digital Converter
        1. 3.10.10.1 Temperature Monitoring of Power Transistor
      11. 3.10.11 Short-Circuit Clamping
      12. 3.10.12 Active and Passive Pulldown
      13. 3.10.13 Thermal Shutdown and Temperature Warning of Driver IC
      14. 3.10.14 Clock Monitor and CRC
      15. 3.10.15 SPI and Register Data Protection
  5. 4Isolated Bias Supply Architecture
  6. 5Summary
  7. 6References
  8. 7Revision History

Introduction to UCC5870-Q1

The UCC5870-Q1 is a device is a TI Functional Safety-Compliant, isolated, single-channel gate driver targeted to drive high power SiC MOSFETs and IGBTs in EV/HEV applications. The input side is isolated from the output side using SiO2 capacitive isolation technology, supporting up to 1-kVRMS working voltage and longer than 40 years isolation barrier life, as well as providing low part-to-part skew, and >100V/ns common mode noise immunity (CMTI).

The UCC5870-Q1 is a platform-supporting device. The flexibility of SPI programmable blanking times, deglitches, thresholds, function enables, and fault handling allow for the UCC5870-Q1 to support a wide variety of IGBT or SiC power transistors that are used across a wide variety of applications. UCC5870-Q1 integrates all of the protection features required in most traction inverter applications. Additionally, the 15A gate drive capability eliminates the need for an external booster circuit, reducing overall solution size. The integrated Miller clamp circuit holds the gate off during transient events and can be configured to use the internal 4A pull-down, or drive an external n-channel MOSFET. All of the protections for the power transistor are integrated into the UCC5870-Q1. It supports DESAT and resistor-based over-current protection. A negative temperature coefficient power transistor temperature sensor monitor is built into the device to alert the host and prevent damage from over-temperature conditions in the switch. A zener-breakdown based clamping function is integrated to reduce the gate drive, and thereby the overshoot energy, when over-voltage spikes during turn-off occur due to inductive kick-back. Real-time gate monitoring is integrated to ensure proper connection to the power transistor and alert the host to a fault in the gate driver path.

A 10-bit ADC is built-in to the UCC5870-Q1 to provide information on power switch temperature, gate driver temperature, or any voltage that must be monitored on the secondary (high-voltage) side of the gate driver. There are six inputs (AIx) available to measure voltages with the ADC. This is convenient to acquire information on the DC-link voltage, or for measuring the VCE/VDS voltage of the power transistor during operation. The ADC features "center mode" operation to ensure low noise measurements, or can be used in a traditional "edge mode" to achieve as many measurements as possible during a PWM cycle. In addition to reading back the ADC information over SPI, a DOUT function provides a feedback signal representing one of the user-selected AIx voltages that can be monitored real-time on the primary side.

The UCC5870-Q1 integrates many safety diagnostics that enable designers to more easily implement an ASIL rated system. There are diagnostics for all of the protection features, as well as latent fault detection for circuits in the gate driver IC itself. The faults are indicated using open-drain outputs, and the specific fault is easily determined using the SPI readback. In addition to all of the safety diagnostic features, the IC integrates a primary side and secondary side "active short circuit" circuits to provide the system designer with a secondary path to control a zero-vector state for the traction inverter in the case of motor controller failure.