SPRACM3E August   2021  – January 2023 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28384D , TMS320F28384S , TMS320F28386D , TMS320F28386S , TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DK-Q1

 

  1.   Using the Fast Serial Interface (FSI) With Multiple Devices in an Application
  2.   Trademarks
  3. 1Introduction to the FSI Module
  4. 2FSI Applications
  5. 3Handshake Mechanism
    1. 3.1 Daisy-Chain Handshake Mechanism
    2. 3.2 Star Handshake Mechanism
  6. 4Sending and Receiving FSI Data Frames
    1. 4.1 FSI Data Frame Configuration APIs
    2. 4.2 Start Transmitting Data Frames
  7. 5Daisy-Chain Topology Tests
    1. 5.1 Two Device FSI Communication
      1. 5.1.1 CPU Control
      2. 5.1.2 DMA Control
      3. 5.1.3 Hardware Control
    2. 5.2 Three Device FSI Communication
      1. 5.2.1 CPU/DMA Control
      2. 5.2.2 Hardware Control
        1. 5.2.2.1 Skew Compensation for Three Device Daisy-Chain System
          1. 5.2.2.1.1 CPU/DMA control
          2. 5.2.2.1.2 Hardware Control
  8. 6Star Topology Tests
  9. 7Event Synchronization Over FSI
    1. 7.1 Introduction
      1. 7.1.1 Requirement of Event Sync for Distributed Systems
      2. 7.1.2 Solution Using FSI Event Sync Mechanism
      3. 7.1.3 Functional Overview of FSI Event Sync Mechanism
    2. 7.2 C2000Ware FSI EPWM Sync Examples
      1. 7.2.1 Location of the C2000Ware Example Project
      2. 7.2.2 Summary of Software Configurations
        1. 7.2.2.1 Lead Device Configuration
        2. 7.2.2.2 Node Device Configuration
      3. 7.2.3 1 Lead and 2 Node F28002x Device Daisy-Chain Tests
        1. 7.2.3.1 Hardware Setup and Configurations
        2. 7.2.3.2 Experimental Results
      4. 7.2.4 1 Lead and 8 Node F28002x Device Daisy-Chain Tests
        1. 7.2.4.1 Hardware Setup and Configurations
        2. 7.2.4.2 Experimental Results
      5. 7.2.5 Theoretical C2000 Uncertainties
    3. 7.3 Additional Tips and Usage of FSI Event Sync
      1. 7.3.1 Running the Example
      2. 7.3.2 Target Configuration File
      3. 7.3.3 Usage of Event Sync for Star Configuration
  10. 8References
  11. 9Revision History

7.2.2.1 Lead Device Configuration

The lead device frame transmission trigger to send the ping packet at regular intervals is done using EPWM1C module. The lead device is configured to send ping packets based on EPWM compare events. User needs to configure EPWM counter compare C register, EPWM_CMPC_VALUE, in the code as per the hardware configuration. This value depends on external factors such as distance between two nodes, device oscillator clock, isolation barriers, and so forth. The frequency to send the ping packet can be in fractions of the EPWM clock frequency and can be further adjusted by configuring the EPWM_CMPC_EVENT_COUNT parameter. The EPWM_CMPC_EVENT_COUNT parameter sets the EPWM event trigger prescalar value, which configures the frame transmission trigger to occur on every Nth compare event. The maximum value of the prescalar is 15.

The duty cycle and frequency of EPWM can be adjusted in the code by updating EPWM_CMPA_VALUE for EPWM1A duty cycle, EPWM_CMPB_VALUE for EPWM1B duty cycle and EPWM_TIMER_TBPRD for frequency. Default values are 50% duty cycle at 20 kHz EPWM frequency.