SPRUJE8C December   2024  – June 2025 AM2752-Q1 , AM2754-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Preface Read This First
      1. 1.2.1 Important Usage Notes
    3. 1.3 Kit Contents
    4. 1.4 Device Information
      1. 1.4.1 Security
    5. 1.5 Audio Expansion Connectors
  6. 2Hardware
    1. 2.1  Component Identification
    2. 2.2  Power Requirements
      1. 2.2.1 Power Input Using USB Type-C Connector
      2. 2.2.2 Power Status LEDs
      3. 2.2.3 Power Tree
      4. 2.2.4 Power Sequence
      5. 2.2.5 PMIC
    3. 2.3  Reset
    4. 2.4  Clock
    5. 2.5  Boot Mode Selection
    6. 2.6  Header Information
    7. 2.7  Push Buttons
    8. 2.8  Switches
    9. 2.9  GPIO Mapping
    10. 2.10 Interfaces
      1. 2.10.1  Memory Interface
        1. 2.10.1.1 OSPI Interface
        2. 2.10.1.2 Board ID EEPROM
        3. 2.10.1.3 MMC0 Interface
        4. 2.10.1.4 HYPERRAM
      2. 2.10.2  Ethernet Interface
        1. 2.10.2.1 Ethernet Add-on Connectors
      3. 2.10.3  Audio Interfaces
        1. 2.10.3.1 Audio Clocking
        2. 2.10.3.2 McASP
        3. 2.10.3.3 MLB
      4. 2.10.4  I2C Interface
      5. 2.10.5  SPI
      6. 2.10.6  UART
      7. 2.10.7  MCAN
      8. 2.10.8  JTAG
      9. 2.10.9  USB
      10. 2.10.10 ADC
    11. 2.11 AEC Mapping
      1. 2.11.1 Audio Expansion Connector 1
      2. 2.11.2 Audio Expansion Connector 2
    12. 2.12 Test Points
  7. 3Hardware Design Files
  8. 4Additional Information
    1. 4.1 If You need Assistance
    2. 4.2 Trademarks
    3. 4.3 Rev. E2 Design Changes
  9. 5References
    1. 5.1 Reference Documents
    2. 5.2 Other TI Components Used This Design
  10. 6Revision History

Push Buttons

The EVM supports multiple user push buttons that provide reset inputs to the processor.

EVM Push Buttons lists the push buttons for AM275x EVM.

Table 2-11 Push Buttons
Push Button Signal Function
SW8 PORz SoC PORz Reset Input
SW6 RESETz SoC Warm Reset input
SW5 INTn User Interrupt Signal
SW10 IO RET WAKE PB I/O retention wake input