SPRUJH3 April   2025 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280023 , TMS320F280023C , TMS320F280025 , TMS320F280025C , TMS320F280034 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037C , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039C , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041C , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049C , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377S , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379S , TMS320F28384D , TMS320F28384S , TMS320F28386D , TMS320F28386S , TMS320F28388D , TMS320F28388S , TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1 , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Configuring the Boot Mode
    1. 2.1 Standalone Boot
      1. 2.1.1 Boot Mode Select Pins (BMSP)
      2. 2.1.2 Boot Definition Table (BOOTDEF)
      3. 2.1.3 Boot ROM OTP Configuration Registers
      4. 2.1.4 CPU2 Boot Flow
    2. 2.2 Emulation Boot
  6. 3Programming the Flash
    1. 3.1 Flash API
    2. 3.2 Flash Kernels
  7. 4Bootloading Code to Flash
    1. 4.1 C2000 Hex Utility
    2. 4.2 Common Boot Modes
      1. 4.2.1 Boot to Flash
      2. 4.2.2 SCI Boot
      3. 4.2.3 CAN Boot
      4. 4.2.4 CAN-FD Boot
      5. 4.2.5 USB Boot
  8. 5FAQ
    1. 5.1 Selecting the BMSP GPIOs with a Software-based Implementation
    2. 5.2 Running a Flash Kernel from the Flash Instead of the RAM
    3. 5.3 No Symbols Defined When Debugging Boot ROM
    4. 5.4 Writing Values in the OTP Using the On-Chip Flash Tool
    5. 5.5 Writing Values in the OTP Using the Flash API Plugin
  9. 6Summary
  10. 7References

Writing Values in the OTP Using the On-Chip Flash Tool

This section demonstrates how to program the OTP using the On-Chip Flash Tool with two example use cases.

Note:

Although this section is based on F280015x devices, the same flow can be applied to any C2000 device that supports custom BMSPs and boot mode tables.

Device specific information can be found in the Boot ROM chapter of the device's Technical Reference Manual (TRM).

  1. After launching a debug session with the intended CPU core, open the On-Chip Flash Tool (see Section 3 for how to find in CCS).
  2. Find GPREG(BOOTCTRL) under Zone 1 or 2 (recall Zone 2 takes precedence over Zone 1). Users can write to the OTP-BOOTPIN-CONFIG and OTP-BOOTDEF-LOW/OTP-BOOTDEF-HIGH registers.
    1. Table 2-7 shows the locations for the boot configuration registers on F280015x devices, and can be found in the Boot ROM Configuration Registers section in the device-specific TRM. The Register Name column is how the boot ROM registers are referenced in the On-Chip Flash tool.

Example 1: Zero Boot Modes Select Pins

This use case exhibits a scenario for an application that does not wish to use any BMSPs and always have the device boot to Flash entry point 0x88000.

Refer to GPIO Assignments section in the device TRM for values to set in the table. For Flash entry points, see the Entry Points section in the TRM details about the entry point addresses for various boot modes. These entry points direct the boot ROM what address to branch to at the end of booting as per the selected boot mode.

  1. Program the BOOTPIN_CONFIG location in OTP as follows:
    1. Set BOOTPIN_CONFIG.BMSP0 to 0xFF (disabled)
    2. Set BOOTPIN_CONFIG.BMSP1 to 0xFF (disabled)
    3. Set BOOTPIN_CONFIG.BMSP2 to 0xFF (disabled)
    4. Set BOOTPIN_CONFIG.KEY to 0x5A for the boot ROM to treat these register bits as valid and use the custom boot table
  2. Program the BOOTDEF location options for the device. This essentially sets up a device-specific boot mode table.
    1. Set BOOTDEF.BOOTDEF0 to 0x23 for booting to Flash (entry address option 1). This sets Flash boot to boot table index 0.

Figure 5-12 shows the completed input fields in the On-Chip Flash tool to program this example.

 Example 1: Flash Plugin Boot
                    Configuration Programmed Figure 5-12 Example 1: Flash Plugin Boot Configuration Programmed
Table 5-1 Resulting Zero Pin Boot Configuration
BMSP Index BOOTDEF
0 0x23 (Flash Boot to address 0x88000)

Example 2: Two Boot Modes Select Pins

This use case demonstrates a more common scenario for an application using two boot mode select pins to select between CAN, Secure Flash, and SCI boot in the custom boot table.

Refer to GPIO Assignments section in the device TRM for values to set in the table. For Flash entry points, see the Entry Points section in the TRM details about the entry point addresses for various boot modes. These entry points direct the boot ROM what address to branch to at the end of booting as per the selected boot mode.

  1. Program the BOOTPIN_CONFIG location in OTP as follows:
    1. Set BOOTPIN_CONFIG.BMSP0 to a user specified GPIO, such as 0x2A for GPIO42
    2. Set BOOTPIN_CONFIG.BMSP1 to a user specified GPIO, such as 0x58 for GPIO88
    3. Set BOOTPIN_CONFIG.BMSP2 to 0xFF (disabled)
    4. Set BOOTPIN_CONFIG.KEY to 0x5A for the boot ROM to treat these register bits as valid and use the custom boot table.
  2. Program the BOOTDEF location options for the device. This essentially sets up a device-specific boot mode table.
    1. Set BOOTDEF.BOOTDEF0 to 0x6A for Secure Flash boot (entry address option 3). This sets Secure Flash boot to boot table index 0.
    2. Set BOOTDEF.BOOTDEF1 to 0x22 for CAN boot option 1. This sets CAN boot to boot table index 1.
    3. Set BOOTDEF.BOOTDEF2 to 0x41 for SCI boot option 2. This sets CAN boot to boot table index 2.

Figure 5-13 shows the completed input fields in the On-Chip Flash tool to program this example.

 Example 2: Flash Plugin Boot
                    Configuration Programmed Figure 5-13 Example 2: Flash Plugin Boot Configuration Programmed
Table 5-2 Two Boot Mode Select Pin Configuration
BMSP Index BOOTDEF
0 0x6A (Secure Flash Boot to address 0x90000)
1 0x22 (CAN boot 1 with alt. GPIOs)
2 0x41 (SCI boot 2 with alt. GPIOs)
3 Don't care (unused)