SPRUJH3 April   2025 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280023 , TMS320F280023C , TMS320F280025 , TMS320F280025C , TMS320F280034 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037C , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039C , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041C , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049C , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377S , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379S , TMS320F28384D , TMS320F28384S , TMS320F28386D , TMS320F28386S , TMS320F28388D , TMS320F28388S , TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1 , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Configuring the Boot Mode
    1. 2.1 Standalone Boot
      1. 2.1.1 Boot Mode Select Pins (BMSP)
      2. 2.1.2 Boot Definition Table (BOOTDEF)
      3. 2.1.3 Boot ROM OTP Configuration Registers
      4. 2.1.4 CPU2 Boot Flow
    2. 2.2 Emulation Boot
  6. 3Programming the Flash
    1. 3.1 Flash API
    2. 3.2 Flash Kernels
  7. 4Bootloading Code to Flash
    1. 4.1 C2000 Hex Utility
    2. 4.2 Common Boot Modes
      1. 4.2.1 Boot to Flash
      2. 4.2.2 SCI Boot
      3. 4.2.3 CAN Boot
      4. 4.2.4 CAN-FD Boot
      5. 4.2.5 USB Boot
  8. 5FAQ
    1. 5.1 Selecting the BMSP GPIOs with a Software-based Implementation
    2. 5.2 Running a Flash Kernel from the Flash Instead of the RAM
    3. 5.3 No Symbols Defined When Debugging Boot ROM
    4. 5.4 Writing Values in the OTP Using the On-Chip Flash Tool
    5. 5.5 Writing Values in the OTP Using the Flash API Plugin
  9. 6Summary
  10. 7References

Introduction

Note: This document only applies to C28x-based microcontrollers. For details on C29x bootloading, please refer to the device-specific Technical Reference Manual.

As applications grow in complexity, the capability for bug squashing, feature additions, and embedded firmware modification is increasingly essential, especially for maintaining device safety and security integrity in the field. C2000 devices accomplish an implementation of firmware updates by offering simple loading utilities in the boot ROM (factory-programmed, Read-Only Memory).

ROM loaders, often referred to as bootloaders, reside in the target device’s boot ROM and allow application code to be loaded from an external host through software. Bootloaders serve as a reliable alternative to JTAG debug probes, which require expensive and specialized hardware with direct access to the target device.

Albeit device dependent, users can select from various peripheral bootloaders as a medium to load firmware onto the target device, such as:

  1. Serial Communications Interface (SCI)
  2. Serial Peripheral Interface (SPI)
  3. Inter-Integrated Circuit (I2C)
  4. Controller Area Network (CAN)
  5. Controller Area Network Flexible Data-rate (CAN-FD)
  6. Universal Serial Bus (USB)
  7. Parallel GPIOs

Every C2000 device has a subset of default boot modes available to be selected. However, if the user requires access to a boot mode not offered in the default boot table or the flexibility for using different GPIO assignments, the One-Time Programmable (OTP) memory must be configured. The OTP registers allow for alternate boot modes to be selected if not offered in the default boot table.

If the user opts to use a peripheral bootloader to load new code onto the device, the application image must be generated in a specific format beforehand, as described in Section 4.1. Once the application is prepared, the data transfer between the boot ROM and host device can proceed over the selected peripheral bootloader. The application code is then loaded into the on-chip RAM by the bootloader and executed.

Peripheral bootloaders are present in every C2000 device's ROM and are simple to use, but are limited to only load code into RAM. Flash kernels bridge the gap between the ROM and Flash by providing an intermediary means to write code into the Flash from the RAM, as described in Section 3.2.

However, users getting started with C2000 bootloading can fall into pitfalls that prove challenging to debug if there is a single misstep along the boot flow (see Figure 1-1 for a general design overview). There are four phases to bootloader design that this report seeks to clarify:

  1. Choosing and configuring the appropriate boot mode
  2. Preparing an application to be loaded onto the device through a peripheral bootloader in the boot ROM
  3. Loading an application into RAM with a bootloader
  4. Using a flash kernel to program the Flash

 General Bootloader Design
                    Flow Figure 1-1 General Bootloader Design Flow