TIDUE53J March   2018  – February 2025 TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1  UCC21710
      2. 2.2.2  UCC5350
      3. 2.2.3  TMS320F28379D
      4. 2.2.4  AMC3306M05
      5. 2.2.5  OPA4388
      6. 2.2.6  TMCS1123
      7. 2.2.7  AMC0330R
      8. 2.2.8  AMC0381D
      9. 2.2.9  UCC14341
      10. 2.2.10 UCC33421
    3. 2.3 System Design Theory
      1. 2.3.1 Three-Phase T-Type Inverter
        1. 2.3.1.1 Architecture Overview
        2. 2.3.1.2 LCL Filter Design
        3. 2.3.1.3 Inductor Design
        4. 2.3.1.4 SiC MOSFETs Selection
        5. 2.3.1.5 Loss Estimations
      2. 2.3.2 Voltage Sensing
      3. 2.3.3 Current Sensing
      4. 2.3.4 System Auxiliary Power Supply
      5. 2.3.5 Gate Drivers
        1. 2.3.5.1 1200-V SiC MOSFETs
        2. 2.3.5.2 650-V SiC MOSFETs
        3. 2.3.5.3 Gate Driver Bias Supply
      6. 2.3.6 Control Design
        1. 2.3.6.1 Current Loop Design
        2. 2.3.6.2 PFC DC Bus Voltage Regulation Loop Design
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
        1. 3.1.1.1 Test Hardware Required
        2. 3.1.1.2 Microcontroller Resources Used on the Design (TMS320F28379D)
        3. 3.1.1.3 F28377D, F28379D Control-Card Settings
        4. 3.1.1.4 Microcontroller Resources Used on the Design (TMS320F280039C)
      2. 3.1.2 Software
        1. 3.1.2.1 Getting Started With Firmware
          1. 3.1.2.1.1 Opening the CCS project
          2. 3.1.2.1.2 Digital Power SDK Software Architecture
          3. 3.1.2.1.3 Interrupts and Lab Structure
          4. 3.1.2.1.4 Building, Loading, and Debugging the Firmware
          5. 3.1.2.1.5 CPU Loading
        2. 3.1.2.2 Protection Scheme
        3. 3.1.2.3 PWM Switching Scheme
        4. 3.1.2.4 ADC Loading
    2. 3.2 Testing and Results
      1. 3.2.1 Lab 1
      2. 3.2.2 Testing Inverter Operation
        1. 3.2.2.1 Lab 2
        2. 3.2.2.2 Lab 3
        3. 3.2.2.3 Lab 4
      3. 3.2.3 Testing PFC Operation
        1. 3.2.3.1 Lab 5
        2. 3.2.3.2 Lab 6
        3. 3.2.3.3 Lab 7
      4. 3.2.4 Test Setup for Efficiency
      5. 3.2.5 Test Results
        1. 3.2.5.1 PFC Mode
          1. 3.2.5.1.1 PFC Start-Up – 230 VRMS, 400 VL-L AC Voltage
          2. 3.2.5.1.2 Steady State Results - PFC Mode
          3. 3.2.5.1.3 Efficiency, THD, and Power Factor Results, 60 Hz – PFC Mode
          4. 3.2.5.1.4 Transient Test With Step Load Change
        2. 3.2.5.2 Inverter Mode
  10. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  11. 5Trademarks
  12. 6About the Authors
  13. 7Revision History

2.3.6.1 Current Loop Design

For the inverter filter shown in Figure 2-26, using KCL and KVL Equation 28 can be written.

TIDA-01606 Inverter Model Figure 2-26 Inverter Model
Equation 14. TIDA-01606

Upon re-arranging, Equation 28 can be written as Equation 15:

Equation 15. TIDA-01606

Similarly on another node, using KCL and KVL, Equation 16 can be written as Equation 16:

Equation 16. TIDA-01606

Assuming Rf is negligible Equation 17 can be written for the capacitor voltage:

Equation 17. TIDA-01606

Typically a synchronous reference frame control is designed, where a dq rotating reference frame at grid frequency speed, and oriented such that the d axis is aligned to the grid voltage vector is used. Using basic trigonometric identities, id and iq can be written as Equation 18 and Equation 19.

Equation 18. TIDA-01606
Equation 19. TIDA-01606

Taking the derivative, and using the partial derivative theorem, Equation 20 is written:

Equation 20. TIDA-01606 TIDA-01606

The following state equations can be written:

Equation 21. TIDA-01606
Equation 22. TIDA-01606

Hence, using these equations, and substituting in Equation 23:

Equation 23. TIDA-01606

Taking the Laplace function on the previous equations:

Equation 24. TIDA-01606

When written in control diagram format, this looks like the following. Feedforward elements are added to remove additional sources of disturbances and errors in the model, two feedforward elements are added,

  1. For the coupling term from the other axis in synchronous frame
  2. For the output grid voltage

The diagram is drawn as shown in Figure 2-27.

TIDA-01606 Id Current Loop Model

where:

  • i*i_d is the current reference
  • Ki_gain is the current sense scalar which is one over max current sense
  • Ki_fltr is the filter that is connected on the current sense path. current sense scalar which is one over max current sense
  • Kvbus_gain is the voltage sense scalar for the bus, which is one over max voltage sensed
  • Kvg_gain is the voltage sense scalar for the grid voltage, which is one over max voltage sensed
Figure 2-27 Id Current Loop Model
TIDA-01606 Iq Current Loop Model Figure 2-28 Iq Current Loop Model

With the feedforward elements, the small signal model can be written as Equation 25(Note: Separate scaling factors are applied to bus voltage and grid voltage due to the differences in the sensing range.):

Equation 25. TIDA-01606

In the case of an LCL filter, the following can be assumed as a simplified model as in Equation 26:

Equation 26. TIDA-01606

The current loop plant is compared with the Software Frequency Response Alert (SFRA) measured data for the current loop as illustrated in Figure 2-29.

TIDA-01606 Current Loop Plant Frequency Response Modeled vs Measured Figure 2-29 Current Loop Plant Frequency Response Modeled vs Measured

Equation 27 represents the compensator designed for the closed-loop operation:

Equation 27. TIDA-01606

With which the open loop plot in Figure 2-30 is achieved, gives roughly > 1-kHz bandwidth in the Id and Iq loop.

TIDA-01606 Current Loop, Open Loop Response Modeled vs Measured Figure 2-30 Current Loop, Open Loop Response Modeled vs Measured