TIDUE53J March   2018  – February 2025 TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1  UCC21710
      2. 2.2.2  UCC5350
      3. 2.2.3  TMS320F28379D
      4. 2.2.4  AMC3306M05
      5. 2.2.5  OPA4388
      6. 2.2.6  TMCS1123
      7. 2.2.7  AMC0330R
      8. 2.2.8  AMC0381D
      9. 2.2.9  UCC14341
      10. 2.2.10 UCC33421
    3. 2.3 System Design Theory
      1. 2.3.1 Three-Phase T-Type Inverter
        1. 2.3.1.1 Architecture Overview
        2. 2.3.1.2 LCL Filter Design
        3. 2.3.1.3 Inductor Design
        4. 2.3.1.4 SiC MOSFETs Selection
        5. 2.3.1.5 Loss Estimations
      2. 2.3.2 Voltage Sensing
      3. 2.3.3 Current Sensing
      4. 2.3.4 System Auxiliary Power Supply
      5. 2.3.5 Gate Drivers
        1. 2.3.5.1 1200-V SiC MOSFETs
        2. 2.3.5.2 650-V SiC MOSFETs
        3. 2.3.5.3 Gate Driver Bias Supply
      6. 2.3.6 Control Design
        1. 2.3.6.1 Current Loop Design
        2. 2.3.6.2 PFC DC Bus Voltage Regulation Loop Design
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
        1. 3.1.1.1 Test Hardware Required
        2. 3.1.1.2 Microcontroller Resources Used on the Design (TMS320F28379D)
        3. 3.1.1.3 F28377D, F28379D Control-Card Settings
        4. 3.1.1.4 Microcontroller Resources Used on the Design (TMS320F280039C)
      2. 3.1.2 Software
        1. 3.1.2.1 Getting Started With Firmware
          1. 3.1.2.1.1 Opening the CCS project
          2. 3.1.2.1.2 Digital Power SDK Software Architecture
          3. 3.1.2.1.3 Interrupts and Lab Structure
          4. 3.1.2.1.4 Building, Loading, and Debugging the Firmware
          5. 3.1.2.1.5 CPU Loading
        2. 3.1.2.2 Protection Scheme
        3. 3.1.2.3 PWM Switching Scheme
        4. 3.1.2.4 ADC Loading
    2. 3.2 Testing and Results
      1. 3.2.1 Lab 1
      2. 3.2.2 Testing Inverter Operation
        1. 3.2.2.1 Lab 2
        2. 3.2.2.2 Lab 3
        3. 3.2.2.3 Lab 4
      3. 3.2.3 Testing PFC Operation
        1. 3.2.3.1 Lab 5
        2. 3.2.3.2 Lab 6
        3. 3.2.3.3 Lab 7
      4. 3.2.4 Test Setup for Efficiency
      5. 3.2.5 Test Results
        1. 3.2.5.1 PFC Mode
          1. 3.2.5.1.1 PFC Start-Up – 230 VRMS, 400 VL-L AC Voltage
          2. 3.2.5.1.2 Steady State Results - PFC Mode
          3. 3.2.5.1.3 Efficiency, THD, and Power Factor Results, 60 Hz – PFC Mode
          4. 3.2.5.1.4 Transient Test With Step Load Change
        2. 3.2.5.2 Inverter Mode
  10. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  11. 5Trademarks
  12. 6About the Authors
  13. 7Revision History

3.1.1.1 Test Hardware Required

The design under test (DUT) in this design is set up and is operated in several pieces:

  • One E7 TIDA-01606 motherboard
  • TMS320F28379D Control Card or TMS320F280039C Control Card
  • Mini USB cable with a snap ferrite (for example, ZCAT3035-1330-BK, recommended for noise immunity)
  • One USB isolator (for safety and noise immunity)
  • Laptop or other computer (for example, Microsoft® Windows® 11 operating system)

The test equipment required to power and evaluate the design is as follows:

  1. 12-V, 2-A bench style supply for primary board power. TI recommends a supply with overvoltage protection (OVP) and overcurrent protection (OCP) features.
  2. For PFC mode:
    • 400 VL-L capable three-phase AC source
    • 11-kW equivalent e-load to be connected at the DC output
  3. For Inverter mode:
    • Star-connected resistive load network (for example, 11-kW load bank)
    • 800-V, 12-A power supply for DC link input
  4. Four-channel, power quality analyzer (for example, WT5000)
  5. Oscilloscope, voltage meter, differential probes (for example, P5200A) and current probes (for example, TCP0030)

The design follows a high-speed edge card (HSEC) concept. This design can be scaled across multiple devices from the C2000™ MCU product family with a compatible HSEC control. The key resources used for controlling the power stage on the MCU are listed in Table 3-1.