TIDUE53J March   2018  – February 2025 TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1  UCC21710
      2. 2.2.2  UCC5350
      3. 2.2.3  TMS320F28379D
      4. 2.2.4  AMC3306M05
      5. 2.2.5  OPA4388
      6. 2.2.6  TMCS1123
      7. 2.2.7  AMC0330R
      8. 2.2.8  AMC0381D
      9. 2.2.9  UCC14341
      10. 2.2.10 UCC33421
    3. 2.3 System Design Theory
      1. 2.3.1 Three-Phase T-Type Inverter
        1. 2.3.1.1 Architecture Overview
        2. 2.3.1.2 LCL Filter Design
        3. 2.3.1.3 Inductor Design
        4. 2.3.1.4 SiC MOSFETs Selection
        5. 2.3.1.5 Loss Estimations
      2. 2.3.2 Voltage Sensing
      3. 2.3.3 Current Sensing
      4. 2.3.4 System Auxiliary Power Supply
      5. 2.3.5 Gate Drivers
        1. 2.3.5.1 1200-V SiC MOSFETs
        2. 2.3.5.2 650-V SiC MOSFETs
        3. 2.3.5.3 Gate Driver Bias Supply
      6. 2.3.6 Control Design
        1. 2.3.6.1 Current Loop Design
        2. 2.3.6.2 PFC DC Bus Voltage Regulation Loop Design
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
        1. 3.1.1.1 Test Hardware Required
        2. 3.1.1.2 Microcontroller Resources Used on the Design (TMS320F28379D)
        3. 3.1.1.3 F28377D, F28379D Control-Card Settings
        4. 3.1.1.4 Microcontroller Resources Used on the Design (TMS320F280039C)
      2. 3.1.2 Software
        1. 3.1.2.1 Getting Started With Firmware
          1. 3.1.2.1.1 Opening the CCS project
          2. 3.1.2.1.2 Digital Power SDK Software Architecture
          3. 3.1.2.1.3 Interrupts and Lab Structure
          4. 3.1.2.1.4 Building, Loading, and Debugging the Firmware
          5. 3.1.2.1.5 CPU Loading
        2. 3.1.2.2 Protection Scheme
        3. 3.1.2.3 PWM Switching Scheme
        4. 3.1.2.4 ADC Loading
    2. 3.2 Testing and Results
      1. 3.2.1 Lab 1
      2. 3.2.2 Testing Inverter Operation
        1. 3.2.2.1 Lab 2
        2. 3.2.2.2 Lab 3
        3. 3.2.2.3 Lab 4
      3. 3.2.3 Testing PFC Operation
        1. 3.2.3.1 Lab 5
        2. 3.2.3.2 Lab 6
        3. 3.2.3.3 Lab 7
      4. 3.2.4 Test Setup for Efficiency
      5. 3.2.5 Test Results
        1. 3.2.5.1 PFC Mode
          1. 3.2.5.1.1 PFC Start-Up – 230 VRMS, 400 VL-L AC Voltage
          2. 3.2.5.1.2 Steady State Results - PFC Mode
          3. 3.2.5.1.3 Efficiency, THD, and Power Factor Results, 60 Hz – PFC Mode
          4. 3.2.5.1.4 Transient Test With Step Load Change
        2. 3.2.5.2 Inverter Mode
  10. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  11. 5Trademarks
  12. 6About the Authors
  13. 7Revision History

Lab 2

In this lab, the power stage is run in an open loop on the hardware or HIL platform. Figure 3-5 shows lab setup of the actual hardware.

TIDA-01606 Inverter Mode With Resistive Load Lab
                    SetupFigure 3-5 Inverter Mode With Resistive Load Lab Setup

Figure 3-6 shows the software diagram.

TIDA-01606 Lab 2 Software DiagramFigure 3-6 Lab 2 Software Diagram

See also the hardware test setup section for actual details of the equipment used for configuring the test. Set the project to Lab 2 by changing the Lab Number in the <tinv_settings.h> or main.syscfg file, (this is changed by powerSUITE GUI when using powerSUITE project).

In the user-settings.h file, some additional options are available, but the following are used for the tests documented in this user guide.

//
// Option to use SDFM based grid sensing for the current loop
// with this option the inv current from hall sensor is overwritten by the grid current from SDFM
// On Revision 5 of the hardware the only option supported is the SDFM sensing
//
#define TINV_SDFM 1
#define TINV_ADC 2
#define TINV_CURRENT_LOOP_SENSE_OPTION TINV_ADC
....
#if TINV_LAB == 2
#define TINV_TEST_SETUP TINV_TEST_SETUP_RES_LOAD
#define TINV_PROTECTION TINV_PROTECTION_ENABLED
#define TINV_SFRA_TYPE TINV_SFRA_CURRENT
#define TINV_SFRA_AMPLITUDE (float32_t)TINV_SFRA_INJECTION_AMPLITUDE_LEVEL2
#define TINV_POWERFLOW_MODE TINV_INVERTER_MODE
#define TINV_DC_CHECK 0
#define TINV_SPLL_TYPE TINV_SPLL_SRF
#endif

In this check, the software is run on the hardware, or the HIL platform, or both.

Set up an appropriate resistive load around 500 Ω (confirm appropriate power rating for your test) for the star connected load to start with, although the inverter mode can be started at no load as well. Enable the 12 V auxiliary supply. Build and load the code, use the lab2.js file to populate the watch variables in the CCS window.

  • Once the CCS watch window is launched in debug mode, begin the test with continuous refresh.
  • Make sure to enable the fans when testing at high power using the TINV_fanSet function in the CCS watch window during the debug session.
  • Turn on the relays by writing a 1 to TINV_neutralRelaySet. The auxiliary power supply draws close to 600 mA.
  • Slowly ramp the DC bus voltage Vbus to 800 V.
  • Set the TINV_clearPWMTrip = 1, to clear the PWM trip signal. Now the switching action begins and sinusoidal voltages start appearing at the output. At this point, the auxiliary power supply draws close to 800 mA. With fans enabled, the total auxiliary supply current is around 1.4 A.
  • TINV_vdInvRef_pu (default value is 0.835) is the modulation index that can be used to vary the AC output of the inverter in open-loop fashion.
  • Verify the sensed voltage and current measurement data in the graph window before proceeding to close the current loop in Lab 3. Figure 3-7 is the graph window for sensed grid side current by using the C2000SDFM module. The scale is shown in per unit (pu).
#ifndef __TMS320C28XX_CLA__ 
TINV_dVal1 = TINV_iGrid_A_sensed_pu;
TINV_dVal2 = TINV_iGrid_B_sensed_pu;
TINV_dVal3 = TINV_iGrid_C_sensed_pu; 
TINV_dVal4 = TINV_rgen.out; 
DLOG_4CH_run(&TINV_dLog1); 
#endif
TIDA-01606 Sensed Grid CurrentsFigure 3-7 Sensed Grid Currents

Figure 3-8 shows the three grid voltages monitored from the CCS graph window. The scale is shown in per unit (pu).

TIDA-01606 Sensed Grid VoltageFigure 3-8 Sensed Grid Voltage

Figure 3-9 shows the captured voltage and current waveform of the inverter operating in open loop at 173 VAC and 0.88 kW.

TIDA-01606 Open Loop Inverter Voltage and Current Waveform
Scope signals: Channel 1 - DC link voltage (blue), Channel 2 - VPN AC voltage (turquoise),
Channel 3 - IPN AC current (red). The voltage probes are scaled down at 500:1.
Figure 3-9 Open Loop Inverter Voltage and Current Waveform