Cambiadores de nivel, búferes y concentradores I2C e I3C

Solve voltage-level mismatches and prevent heavy bus capacitance loading

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Our I2C level shifters, buffers and hubs strengthen your I2C bus signal and prevent heavy bus-capacitance loading. These products also help solve voltage-level mismatches because the designer can use the latest peripherals by adding level shifters that enable different voltage levels on host and device.

Featured I2C level shifters, buffers & hubs

What makes our I2C level shifters, buffers and hubs different?

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Diverse portfolio of solutions

Diverse features such as rise time accelerators, stuck bus recovery and internal current sources allow you to find a solution for any application while meeting I2C requirements.

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Innovative solutions

Continuous improvement and new solutions that allow for faster data rate (up to 12.5 MHz) and small packages (X2SON) that allow for you to design innovative solutions.

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Cost-effective and reliable

Our IxC devices meet l2C and I3C standards and are designed to provide reliable solutions that help reduce design cost by saving board space (small packaging) and reducing external components.

Recursos técnicos

Application note
Application note
Why, When, and How to use I2C Buffers
The I2C communication interface has been standardized for reliable communication. One of those standards is max bus capacitance.  Learn how the I2C buffer is a solution for systems requiring a larger bus capacitance. 
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Recurso
Recurso
Intro to I2C: what the Internet doesn't tell you 
What initial internet searching will tell you is that I2C makes it easy for system designers to implement robust system controls. Not only is this protocol useful, but there are many device functions that can benefit your system. 
Application note
Application note
I2C Dataline Handoff Delay
Adding a buffer device can introduce propagation delays and result in visible SDA handoffs. The TCA9517 device, an I2C static voltage offset buffer, is examined for its propagation delay which can result in the SDA handoff delay.
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Recursos de diseño y desarrollo

Herramienta de diseño
Herramienta de diseño I2C
Utilice la herramienta I2C Designer para resolver rápidamente conflictos de direccionamiento, nivel de tensión y frecuencia en diseños basados en I2C. Ingrese entradas maestras y esclavas para generar automáticamente un árbol I2C o construir fácilmente una solución personalizada. Esta herramienta (...)
Placa de evaluación
TCA39306 Módulo de evaluación de baja tensión con selector de nivel I²C

Este EVM proporciona condiciones de carga configurables a través de resistencias de subida ajustables y capacitancia del bus, lo que permite a los diseñadores probar fácilmente el rendimiento de este dispositivo en su sistema.
Herramienta de simulación
PSpice® para herramienta de diseño y simulación de TI
PSpice® para TI es un entorno de diseño y simulación que ayuda a evaluar la funcionalidad de los circuitos analógicos. Esta completa suite de diseño y simulación utiliza un motor de análisis analógico de Cadence®. Disponible sin ningún costo, PSpice para TI incluye una de las bibliotecas de modelos (...)