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Product details

Parameters

Type Retimer Mux Number of channels (#) 2 Input compatibility AC-coupling, CML Speed (Max) (Gbps) 12.5 Protocols 10G-SR/LR, Infiniband, CPRI, Interlaken, General purpose Operating temperature range (C) -40 to 85 open-in-new Find other Ethernet retimers, redrivers & mux-buffers

Package | Pins | Size

WQFN (RTW) 24 16 mm² 4 x 4 open-in-new Find other Ethernet retimers, redrivers & mux-buffers

Features

  • Pin Compatible Retimer Family
    • DS110DF111 with DFE: 8.5 – 11.3 Gbps
    • DS125DF111 with DFE: 9.8 – 12.5 Gbps
  • Adaptive CTLE: 33 dB Max Boost at 6.25 GHz
  • Self Tuning 5-Tap DFE
  • Raw Equalized and Retimed Data Loopback
  • Adjustable Transmit VOD: 600 to 1300 mVp-p
  • Settable Tx De-Emphasis Driver 0 to –12dB
  • Low Power Consumption: 220 mW/Channel
  • Locks to Half/Quarter/Eighth Data Rates for
    Legacy Support
  • On-Chip Eye Monitor (EOM), PRBS Generator
  • Input Signal Detection, CDR Lock
    Detection/Indicator
  • Single 3.3-V or 2.5-V Power Supply
  • SMBus, EEPROM, or Pin Based Configuration
  • 4-mm × 4-mm, 24-Pin WQFN Package
  • Operating Temp Range: –40°C to 85°C
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Description

The DS125DF111 is a dual channel (1-lane bidirectional) retimer with integrated signal conditioning. The DS125DF111 includes an input Continuous-Time Linear Equalizer (CTLE), clock and data recovery (CDR) and transmit driver on each channel.

The DS125DF111 with its on-chip Decision Feedback Equalizer (DFE) can enhance the reach and robustness of long, lossy, cross-talk-impaired high speed serial links to achieve BER < 1x10–15. For less demanding applications/interconnects, the DFE can be switched off and achieve the same BER performance. The DS125DF111 and DS110DF111 devices are pin-compatible.

Each channel of the DS125DF111 independently locks to specific serial data at data rates from 9.8 to 12.5 Gbps or to any supported sub-rate of these data rates. This simplifies system design and lowers overall cost.

Programmable transmit de-emphasis driver offers precise settings to meet the SFF-8431 output eye template. The fully adaptive receive equalization (CTLE and DFE) enables longer distance transmission in lossy copper interconnect and backplanes with multiple connectors. The CDR function is ideal for use in front port parallel optical module applications to reset the jitter budget and retime high speed serial data.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 6
Type Title Date
* Datasheet DS125DF111 Multi-Protocol 2-Channel 9.8 - 12.5 Gb/s Retimer datasheet (Rev. A) Jun. 30, 2015
Application notes Extend reach with Ethernet Redrivers and Retimers for 10G-12.5G Applications May 15, 2020
Application notes DS110DF111,DS125DF111, DS100DF410, DS110DF410, and DS125DF410 Programming Guide Mar. 25, 2019
User guides DS125DF111EVM User's Guide (Rev. A) Jan. 26, 2016
Application notes Understanding EEPROM Programming for 10G to 12.5G Retimers Jan. 13, 2016
Application notes Selecting TI SigCon Devices for SFF-8431 SFP+ Applications May 06, 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
499
Description

The DS125DF111EVM is a high bandwidth platform with a SMA interface to evaluate the DS125DF111 dual channel (1-lane bidirectional) retimer with integrated signal conditioning. The DS125DF111 includes an input Continuous-Time Linear Equalizer (CTLE), clock and data recovery (CDR), and transmit driver (...)

Features
  • Adjustable Transmit VOD : 600 to 1300 mVp-p
  • Settable transmit de-emphasis driver to -12 dB
  • Low power consumption : 200 mW/ch
  • Locks to half/quarter/eighth data rates for legacy support
  • On-chip Eye Monitor (EOM), PRBS Generator

Design tools & simulation

SIMULATION MODELS Download
SNLM143.PDF (25 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
WQFN (RTW) 24 View options

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