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Product details

Parameters

Device type Redriver Protocols PCIe1, PCIe2, PCIe3 Application PCIe, SATA, SAS Number of channels (#) 8 Speed (Max) (Gbps) 8 Supply voltage (V) 2.5, 3.3 Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other PCIe, SAS & SATA ICs

Package | Pins | Size

WQFN (NJY) 54 55 mm² 10 x 5.5 open-in-new Find other PCIe, SAS & SATA ICs

Features

  • Low 70 mW/Channel (Typ) Power Consumption,
    With Option to Power Down Unused Channels
  • Seamless Link Training Support
  • Advanced Configurable Signal Conditioning I/O
    • Receive CTLE up to ∼10 dB at 4 GHz
    • Linear Output Driver
    • Variable Output Voltage Range up to 1200
      mVp-p
  • Automatic Receiver Detect (Hot-Plug)
  • Ultra-Low Input-to-Output Latency: 80 ps (Typ)
  • Programmable via Pin Selection, EEPROM, or
    SMBus Interface
  • Single Supply Voltage: 2.5 V or 3.3 V
  • 4 kV HBM ESD Rating
  • −40°C to 85°C Operating Temperature Range
  • Flow-Thru Layout in 10 mm x 5.5 mm 54-Pin
    Leadless WQFN Package
  • Pin Compatible with DS80PCI800
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Description

The DS80PCI810 is an extremely low-power high-performance repeater/redriver designed to support eight channels carrying high speed interface up to 8 Gbps, such as PCIe Gen-1, 2, and 3. The receiver’s continuous time linear equalizer (CTLE) provides high frequency boost that is programmable from 2.7 to 9.5 dB at 4 GHz (8 Gbps) followed by a linear output driver. The CTLE receiver is capable of opening an input eye that is completely closed due to inter symbol interference (ISI) induced by interconnect medium such as board traces or twin axial-copper cables. The programmable equalization maximizes the flexibility of physical placement within the interconnect channel and improves overall channel performance.

When operating in PCIe applications, the DS80PCI810 preserves transmit signal characteristics, thereby allowing the host controller and the end point to negotiate transmit equalizer coefficients. This transparency in the link training protocol facilitates system level interoperability and minimizes latency.

The programmable settings can be applied easily via pin control, software (SMBus or I2C), or direct loading from an external EEPROM. In EEPROM mode, the configuration information is automatically loaded on power up, thereby eliminating the need for an external microprocessor or software driver.

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Technical documentation

= Featured
No results found. Please clear your search and try again. View all 11
Type Title Date
* Datasheet DS80PCI810 Low-Power 8 Gbps 8-Channel Linear Repeater datasheet (Rev. A) Feb. 06, 2015
Technical articles Small doesn’t mean you compromise performance when implementing signal isolation May 25, 2017
Technical articles NVME and PCI Express: What’s the difference? Aug. 11, 2015
Technical articles Differential pairs: four things you need to know about vias Jun. 10, 2015
Technical articles Differential pairs: what you really need to know May 05, 2015
Application notes Advanced linear equalization in multi-gigabit systems Apr. 28, 2015
Application notes Analog Applications Journal 2Q 2015 Apr. 28, 2015
Application notes Channel Tuning Made Easy Using Linear Repeaters for 10G and 12G Applications Jan. 20, 2015
Application notes Understanding EEPROM Programming for High Speed Repeaters and Mux Buffers Oct. 09, 2014
Application notes Advanced Linear Repeater Used in PCIe 3.0 Add-in Card Compliance Environment Oct. 02, 2014
User guides DS80PCI810EVM User's Guide Sep. 03, 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$399.00
Description

The DS80PCI810EVM – SMA evaluation kit provides a complete high bandwidth platform to evaluate PCIe signal conditioning features of the Texas Instruments DS80PCI810 repeater/redriver. The DS80PCI810EVM can be used for standard compliance testing, performance evaluation, and initial system (...)

Features
  1. 8-Channel Repeater up to 8 Gbps
  2.  Transparent management of link training protocols for PCIe
  3.  Programmable via pin selection, EEPROM, or SMBus interface
  4.  Single supply operation, VIN = 3.3V ± 10% or VDD = 2.5V ± 5%

Design tools & simulation

SIMULATION MODELS Download
SNLM143.PDF (25 KB) - IBIS Model
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

Reference designs

REFERENCE DESIGNS Download
High-Speed Front-End for PCIe Gen-3 Cards Reference Design
TIDA-00423 This verified reference design is a PCIe Gen-3 high-speed front-end card design to extend the PCB trace distance of  a PCIe sub-system. The board is designed to fit in a x16 lane width PCIe Gen-3 slot between a motherboard and PCIe Gen3 add-in card. This reference design provides users with a (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
WQFN (NJY) 54 View options

Ordering & quality

Support & training

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Videos

WEBENCH® Interface Designer Overview Training

How to quickly optimize signal integrity in high-speed designs with WEBENCH Interface Designer.

Posted: 23-Jan-2015
Duration: 21:15

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