PCIe® 4.0, 16 Gbps, 8-Lane (16-Channel) retimer
Product details
Parameters
Features
- 8-Lane (16-Channel) Protocol-Aware PCI-Express Retimer supporting 16.0, 8.0, 5.0, and 2.5 GT/s Interfaces
- Inter-Chip Communication (ICC) Enable Dual Chip Link Width Scaling to form 16-Lane Gen-4 Retimer
- Supports Common Clock, Separate Reference Clock with no SSC, and Separate Reference Clock with SSC
- Supports 2x4 and 4x2 Bifurcation
- Adaptive Receive CTLE and DFE Supporting Maximum PCIe Gen-4 Channel Loss
- Supports Equalization Training
- Low-Latency Architecture
- On-Chip Eye Opening Monitor (EOM) and PCIe Receive Margining Capability
- Small 8.5-mm x 13.4-mm BGA Package
- Flow-Through Pinout Enables Signal Breakout in Two Signal Layers
- Compatible with Standard 1.0-mm BGA PCB Manufacturing
- Dual Power Supply: 1.1 V and 1.8 V
- I2C Configuration (up to 1 MHz) via External EEPROM or I2C Master
- Industrial Temperature Range: -40 °C to 85 °C
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Description
The DS160PT801 is a high-performance eight-lane (16-channel) PCI-Express protocol-aware retimer supporting all standard PCIe data rates up to 16 GT/s. It is used to extend the reach and robustness of high-speed PCIe serial links, from chip-to-chip motherboard links to more complex multi-connector system topologies.
The DS160PT801 supports both common-clock and independent reference clock architectures, with and without spread-spectrum clocking. This allows for maximum flexibility in defining the system clock architecture.
The eight lanes in the DS160PT801 can be bifurcated into two x4 or four x2 links to support different system topologies.
A compact yet easy-to-manufacture BGA package provides excellent thermal performance while enabling optimal placement in space-constrained applications like 1RU riser cards. This feature reduces overall solution size, PCB routing complexity, and BOM cost.
Diagnostic capabilities include in-band receiver margining, out-of-band non-destructive horizontal/vertical eye margin monitor, receiver loopback, encoding error detection, and on die temperature sensor. These features help gauge link margin and can be used to monitor system health over time.

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Preproduction samples are available (PDS160PT801C0ACBT). Request now
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Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | DS160PT801 PCIe® 4.0, 16Gbps, 8-Lane (16-Channel) Retimer datasheet | Aug. 29, 2017 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Supports PCI-Express 4.0 1 x4, 2 x4, and 4 x4 bifurcation
- Two x8 SlimSAS (SFF-8654) connectors
- LMK00334 PCI-Express 4.0 clock buffer
- Flexible assignment of PCI-Express side band signals
Description
Features
- 8-Lane (16-Channel) Protocol-aware PCI-Express® retimer supporting 16.0, 8.0, 5.0, and 2.5 GT/s interfaces
- Supports common clock, separate clock, and SRIS
- Supports 2x4 and 4x2 bifurcation
- Adaptive receive CTLE and DFE supporting maximum PCIe® gen-4 channel loss
- Supports equalization training
Software development
SigCon Architect (...)
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
(ACB) | 332 | View options |
Ordering & quality
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- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
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Support & training
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