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Product details

Parameters

Device type Repeater Protocols 10G-SR/LR, 10G-KR, 40G-SR4/LR4, 40G-KR4, SAS1, SAS2, SAS3, SATA1, SATA2, SATA3, Infiniband, Fibre Channel, CPRI, OBSAI, Interlaken, sRIO, General purpose, PCIe1, PCIe2, PCIe3 Application Front Port, Backplane, Peripheral I/O Number of channels (#) 8 Speed (Max) (Gbps) 12.5 Supply voltage (V) 3.3, 2.5 Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other PCIe, SAS & SATA ICs

Package | Pins | Size

WQFN (NJY) 54 55 mm² 10 x 5.5 open-in-new Find other PCIe, SAS & SATA ICs

Features

  • Low 70 mW/Channel (Typ) Power Consumption,
    with Option to Power Down Unused Channels
  • Seamless Link Training Support
  • Enables Host ASIC to Meet Front-Port Eye Mask
    Requirements over Longer Reach
  • Advanced Configurable Signal Conditioning I/O
    • Receive CTLE up to 10 dB at 6 GHz
    • Linear Output Driver
    • Variable Output Voltage Range up to 1200
      mVp-p
  • Programmable via Pin Selection, EEPROM, or
    SMBus Interface
  • Single Supply Voltage: 2.5 V or 3.3 V
  • −40°C to 85°C Operating Temperature Range
  • Flow-Thru Layout in 10 mm × 5.5 mm 54-Pin
    Leadless WQFN Package
open-in-new Find other PCIe, SAS & SATA ICs

Description

The DS125BR820 is an extremely low-power high-performance repeater/redriver designed to support eight channels carrying high speed interface up to 12.5 Gbps, such as 40G-CR4, 40G-KR4, SAS/SATA, and PCIe. The receiver’s continuous time linear equalizer (CTLE) provides high frequency boost that is programmable from 3 to 10 dB at 6 GHz (12 Gbps) followed by a linear output driver. The CTLE receiver is capable of opening an input eye that is completely closed due to inter symbol interference (ISI) induced by interconnect medium such as board traces or twin axial-copper cables. The programmable equalization maximizes the flexibility of physical placement within the interconnect channel and improves overall channel performance.

When operating in 40G-CR4/KR4, SAS/SATA, and PCIe applications, the DS125BR820 preserves transmit signal characteristics, thereby allowing the host controller and the end point to negotiate transmit equalizer coefficients. This transparency in the link training protocol facilitates system level interoperability and minimizes latency.

The programmable settings can be applied easily via pin control, software (SMBus or I2C), or direct loading from an external EEPROM. In EEPROM mode, the configuration information is automatically loaded on power up, thereby eliminating the need for an external microprocessor or software driver.

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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$399.00
Description

The DS125BR820EVM – SMA evaluation kit provides a complete high bandwidth platform to evaluate the 40GbE, PCIe, and SAS/SATA signal conditioning features of the Texas Instruments DS125BR820 repeater/redriver. The DS125BR820EVM can be used for standard compliance testing, performance evaluation, and (...)

Features
  •  8-Channel Repeater up to 12.5 Gbps
  •  Transparent management of link training protocols for PCIe Gen 1/2/3, SAS 1/2/3, SATA 6G, and 40G-KR4/CR4
  •  Programmable via pin selection, EEPROM, or SMBus interface
  •  Single supply operation, VIN = 3.3V ± 10% or VDD = 2.5V ± 5%

Design tools & simulation

SIMULATION MODELS Download
SNLM143.PDF (25 KB) - IBIS Model
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

Reference designs

REFERENCE DESIGNS Download
2-port 40GbE/10GbE QSFP+ Signal Conditioner Reference Design
TIDA-00417 This verified reference design is a signal conditioning solution for front-port QSFP+ supporting two 40GbE ports compatible with 40G-CR4/SR4/LR4 and 10G SFF-8431 requirements. The design is applicable to optical and passive/active copper cables. It allows for reach extension between the Switch ASIC (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
WQFN (NJY) 54 View options

Ordering & quality

Support & training

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Videos

WEBENCH® Interface Designer Overview Training

How to quickly optimize signal integrity in high-speed designs with WEBENCH Interface Designer.

Posted: 23-Jan-2015
Duration: 21:15

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