The SN65LVCP1414 is an asynchronous, protocol-agnostic, low latency, four-channel linear
equalizer optimized for use up to 14.2Gbps and compensates for losses in backplane or active cable
applications. The architecture of the SN65LVCP1414 is designed to work with an ASIC or FPGA with
digital equalization employing Decision Feedback Equalizers (DFE). The SN65LVCP1414 linear
equalizer preserves the shape of the transmitted signal ensuring optimum DFE performance. The
SN65LVCP1414 provides a low power solution while at the same time extending the effectiveness of
DFE.
The SN65LVCP1414 is configurable via I2C or GPIO interface.
Using the I2C interface of the SN65LVCP1414 enables the user to control
independently the Equalization, Path Gain, and Output Dynamic Range for each individual channel. In
GPIO mode, Equalization, Path Gain, and Output Dynamic Range can be set for all channels using the
GPIO Input pins.
The SN65LVCP1414 outputs can be disabled independently via
I2C.
The SN65LVCP1414 operates from a single 2.5V or 3.3V power supply.
The package for the SN65LVCP1414 is a 38 pin 5-mm × 7-mm × 0.75-mm QFN (Quad Flat-pack
No-lead) lead-free package with 0.5mm pitch and is characterized for operation from –40°C to
85°C.
The SN65LVCP1414 is an asynchronous, protocol-agnostic, low latency, four-channel linear
equalizer optimized for use up to 14.2Gbps and compensates for losses in backplane or active cable
applications. The architecture of the SN65LVCP1414 is designed to work with an ASIC or FPGA with
digital equalization employing Decision Feedback Equalizers (DFE). The SN65LVCP1414 linear
equalizer preserves the shape of the transmitted signal ensuring optimum DFE performance. The
SN65LVCP1414 provides a low power solution while at the same time extending the effectiveness of
DFE.
The SN65LVCP1414 is configurable via I2C or GPIO interface.
Using the I2C interface of the SN65LVCP1414 enables the user to control
independently the Equalization, Path Gain, and Output Dynamic Range for each individual channel. In
GPIO mode, Equalization, Path Gain, and Output Dynamic Range can be set for all channels using the
GPIO Input pins.
The SN65LVCP1414 outputs can be disabled independently via
I2C.
The SN65LVCP1414 operates from a single 2.5V or 3.3V power supply.
The package for the SN65LVCP1414 is a 38 pin 5-mm × 7-mm × 0.75-mm QFN (Quad Flat-pack
No-lead) lead-free package with 0.5mm pitch and is characterized for operation from –40°C to
85°C.