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UCC27301A-Q1

ACTIVE

Automotive 120V 4.5A half-bridge driver with 8V UVLO, interlock, and enable options

UCC27301A-Q1

ACTIVE

Product details

Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 17 Peak output current (A) 4.5 Operating temperature range (°C) -40 to 150 Undervoltage lockout (typ) (V) 8 Rating Automotive Propagation delay time (µs) 0.02 Rise time (ns) 7.2 Fall time (ns) 5.5 Iq (mA) 0.001 Input threshold TTL Channel input logic TTL Switch node voltage (V) -20 Features Enable, Integrated bootstrap diode, Interlock, Negative Voltage Handling on Input TI functional safety category Functional Safety-Capable Driver configuration Dual, Noninverting, TTL compatible
Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 17 Peak output current (A) 4.5 Operating temperature range (°C) -40 to 150 Undervoltage lockout (typ) (V) 8 Rating Automotive Propagation delay time (µs) 0.02 Rise time (ns) 7.2 Fall time (ns) 5.5 Iq (mA) 0.001 Input threshold TTL Channel input logic TTL Switch node voltage (V) -20 Features Enable, Integrated bootstrap diode, Interlock, Negative Voltage Handling on Input TI functional safety category Functional Safety-Capable Driver configuration Dual, Noninverting, TTL compatible
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm) HSOIC (DDA) 8 29.4 mm² (4.9 mm × 6 mm) VSON (DRC) 10 9 mm² (3 mm × 3 mm)
  • Drives two N-channel MOSFETs in half-bridge configuration
  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1
  • –40°C to +150°C junction temperature range
  • 120V abs max voltage on HB pin
  • 3.7A sink, 4.5A source output currents
  • 8V to 17V VDD operating range (20V abs max) with UVLO
  • –(28–VDD)V abs max negative transient tolerance on HS pin (<100ns pulse)
  • –10V to +20V abs max input pins tolerance, independent of supply voltage range (TTL compatible)
  • Switching parameters:
    • 20ns typical propagation delay times
    • 7.2ns rise and 5.5ns fall time with 1000pF load
    • 4ns typical delay matching
  • Integrated bootstrap diode
  • Input interlock
  • Enable/disable functionality with low current consumption (3µA typical) when disabled (DRC package only)
  • Functional Safety-Capable
  • Drives two N-channel MOSFETs in half-bridge configuration
  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1
  • –40°C to +150°C junction temperature range
  • 120V abs max voltage on HB pin
  • 3.7A sink, 4.5A source output currents
  • 8V to 17V VDD operating range (20V abs max) with UVLO
  • –(28–VDD)V abs max negative transient tolerance on HS pin (<100ns pulse)
  • –10V to +20V abs max input pins tolerance, independent of supply voltage range (TTL compatible)
  • Switching parameters:
    • 20ns typical propagation delay times
    • 7.2ns rise and 5.5ns fall time with 1000pF load
    • 4ns typical delay matching
  • Integrated bootstrap diode
  • Input interlock
  • Enable/disable functionality with low current consumption (3µA typical) when disabled (DRC package only)
  • Functional Safety-Capable

The UCC27301A-Q1 is a robust gate driver designed to drive two N-channel MOSFETs in a half-bridge or synchronous buck configuration with an absolute maximum bootstrap voltage of 120V. Its 3.7A peak source and 4.5A peak sink current capability allows the UCC27301A-Q1 to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching node (HS pin) can handle negative transient voltage, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance.

The inputs are independent of supply voltage and are able to withstand -10V and +20V absolute maximum ratings. The low-side and high-side gate drivers are matched to 4ns between the turn on and turn off of each other and are controlled throught the LI and HI input pins respectively. However, the input interlock logic will turn both driver outputs low whenever both LI and HI inputs are high at the same time. An on-chip 120V rated bootstrap diode eliminates the need to add discrete bootstrap diodes. Undervoltage lockout (UVLO) is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.

The UCC27301A-Q1 is a robust gate driver designed to drive two N-channel MOSFETs in a half-bridge or synchronous buck configuration with an absolute maximum bootstrap voltage of 120V. Its 3.7A peak source and 4.5A peak sink current capability allows the UCC27301A-Q1 to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching node (HS pin) can handle negative transient voltage, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance.

The inputs are independent of supply voltage and are able to withstand -10V and +20V absolute maximum ratings. The low-side and high-side gate drivers are matched to 4ns between the turn on and turn off of each other and are controlled throught the LI and HI input pins respectively. However, the input interlock logic will turn both driver outputs low whenever both LI and HI inputs are high at the same time. An on-chip 120V rated bootstrap diode eliminates the need to add discrete bootstrap diodes. Undervoltage lockout (UVLO) is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.

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Technical documentation

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* Data sheet UCC27301A-Q1 Automotive 120V, 3.7A/4.5A Half-Bridge Driver with 8V UVLO, Interlock and Enable datasheet (Rev. C) PDF | HTML Jul 9, 2024
Product overview UCC272xx and UCC273xx: 120V Half-Bridge Gate Drivers for High-Powered Applications (Rev. A) PDF | HTML Mar 2, 2026
Application note Mapping Application Requirements with the 120V Halfbridge Gate Driver (Rev. A) PDF | HTML Feb 27, 2026
Application note Riding the Wave of Non-Isolated Gate Drivers in LEVs PDF | HTML Nov 14, 2025
Application note Selecting Gate Drivers for HVAC Systems (Rev. A) PDF | HTML Nov 7, 2025
White paper Driving the Next xEVs With High-Performing Non-Isolated Gate Drivers PDF | HTML Apr 2, 2025
Functional safety information UCC273x1A-Q1 Functional Safety FIT Rate, FMD and Pin FMA PDF | HTML Sep 30, 2024
Application note Using Half-Bridge Gate Driver to Achieve 100% Duty Cycle for High Side FET PDF | HTML Mar 25, 2024
Application note Challenges and Solutions for Half-Bridge Gate Drivers in Bidirectional DC-DC Converters PDF | HTML Jan 24, 2024
Application note Bootstrap Circuitry Selection for Half Bridge Configurations (Rev. A) PDF | HTML Sep 8, 2023
Application note Comparative Analysis of Two Different Methods for Gate-Drive Current Boosting (Rev. A) PDF | HTML Feb 17, 2022
Application note Voltage Fed Full Bridge DC-DC & DC-AC Converter High-Freq Inverter Using C2000 (Rev. D) Apr 7, 2021
Application note Implementing High-Side Switches Using Half-Bridge Gate Drivers for 48-V Battery. May 12, 2020
Application brief External Gate Resistor Selection Guide (Rev. A) Feb 28, 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) Feb 28, 2020
Application brief Small Price Competitive 100-V Driver for 48-V BLDC Motor Drives Oct 22, 2019
Application note Maximizing DC/DC converter designs with UCC27282 Jan 18, 2019
Application note UCC27282 Improving motor drive system robustness Jan 11, 2019
Application note PFC Design Choice for On Board Charger Designs May 24, 2018
Application brief Reducing Switching Losses in On-Board Chargers for Electric Vehicles Mar 27, 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

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Simulation model

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SLUM893.ZIP (28 KB) - PSpice model
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Calculation tool

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SOIC (D) 8 Ultra Librarian
HSOIC (DDA) 8 Ultra Librarian
VSON (DRC) 10 Ultra Librarian

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