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Product details

Parameters

Bus voltage (Max) (V) 120 Power switch MOSFET Input VCC (Min) (V) 5.5 Input VCC (Max) (V) 16 Peak output current (A) 3.5 Rise time (ns) 12 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 5 Rating Automotive Number of channels (#) 2 Fall time (ns) 10 Prop delay (ns) 16 Iq (uA) 2 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) -14 Features Enable open-in-new Find other Half-bridge drivers

Package | Pins | Size

SOIC (D) 8 19 mm² 4.9 x 3.9 open-in-new Find other Half-bridge drivers

Features

  • AEC-Q100 qualified with following results
    • Temperature grade 1 (Tj = –40°C to 150°C)
    • Device HBM ESD classification level 1B
    • Device CDM ESD classification level C3
  • Drives two N-channel MOSFETs in high-side low-side configuration
  • 5-V typical under voltage lockout
  • 16-ns typical propagation delay
  • 12-ns rise, 10-ns fall time with 1.8-nF load
  • 1-ns typical delay matching
  • 5-V negative voltage handling on inputs
  • 14-V negative voltage handling on HS
  • 3.5-A sink, 2.5-A Source output currents
  • Absolute maximum boot voltage 120 V
  • Integrated bootstrap diode

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Description

The UCC27284-Q1 is a robust N-channel MOSFET driver with a maximum switch node (HS) voltage rating of 100 V. It allows for two N-channel MOSFETs to be controlled in half-bridge or synchronous buck configuration based topologies. Its 3.5-A peak sink current and 2.5-A peak source current along with low pull-up and pull-down resistance allows the UCC27284-Q1 to drive large power MOSFETs with minimum switching losses during the transition of the MOSFET Miller plateau. Since the inputs are independent of the supply voltage, UCC27284-Q1 can be used in conjunction with both analog and digital controllers. Two inputs, and therefore outputs, can be overlapped, if needed, in applications such as secondary side full-bridge synchronous rectification.

The input pins as well as the HS pin are able to tolerate significant negative voltage, which improves system robustness. 5-V UVLO allows systems to operate at lower bias voltages, which is necessary in many high frequency applications and improves system efficiency in certain operating modes. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency.

Under voltage lockout (UVLO) is provided for both the high-side and low-side driver stages forcing the outputs low if the VDD voltage is below the specified threshold. An integrated bootstrap diode eliminates the need for an external discrete diode in many applications, which saves board space and reduces system cost. UCC27284-Q1 is offered in SOIC package for harsh system environments.

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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
49
Description
UCC27282EVM-335 is designed for evaluating UCC27282DRC, which is a 120V half bridge gate driver with high source and sink peak current capability. This EVM could be served to evaluate the driver IC against its datasheet. The EVM can also be used as Driver IC component selection guide. The EVM can be (...)
Features
  • High performance driver with input and output interface
  • Ability to test most data sheet parameters
  • Ability to compare performance of various drivers with compatible pinout

Design tools & simulation

SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

CAD/CAE symbols

Package Pins Download
SOIC (D) 8 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
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  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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