Product details

Bus voltage (Max) (V) 120 Power switch MOSFET Input VCC (Min) (V) 5.5 Input VCC (Max) (V) 16 Peak output current (A) 3.5 Rise time (ns) 12 Operating temperature range (C) -40 to 125, 125 to -40 Undervoltage lockout (Typ) 5 Rating Automotive Number of channels (#) 2 Fall time (ns) 10 Prop delay (ns) 16 Iq (uA) 2 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) -14 Features Enable, Interlock Driver configuration Dual inputs
Bus voltage (Max) (V) 120 Power switch MOSFET Input VCC (Min) (V) 5.5 Input VCC (Max) (V) 16 Peak output current (A) 3.5 Rise time (ns) 12 Operating temperature range (C) -40 to 125, 125 to -40 Undervoltage lockout (Typ) 5 Rating Automotive Number of channels (#) 2 Fall time (ns) 10 Prop delay (ns) 16 Iq (uA) 2 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) -14 Features Enable, Interlock Driver configuration Dual inputs
HSOIC (DDA) 8 19 mm² 4.9 x 3.9 SOIC (D) 8 19 mm² 4.9 x 3.9 VSON (DRC) 10 9 mm² 3 x 3
  • AEC-Q100 qualified with following results
    • Temperature grade 1 (Tj = –40°C to 150°C)
    • HBM ESD classification level 1B
    • CDM ESD classification level C3
  • Drives two N-channel MOSFETs in high-side low-side configuration
  • 5-V typical under voltage lockout
  • Input interlock
  • Enable/disable functionality in DRC package
  • 16-ns typical propagation delay
  • 12-ns rise, 10-ns fall time with 1.8-nF load
  • 1-ns typical delay matching
  • Absolute Maximum Negative Voltage Handling on Inputs (–5 V)
  • Absolute Maximum Negative Voltage Handling on HS (–14 V)
  • ±3-A peak output current
  • Absolute maximum boot voltage 120 V
  • Low current (7-µA) consumption when disabled
  • Integrated bootstrap diode
  • AEC-Q100 qualified with following results
    • Temperature grade 1 (Tj = –40°C to 150°C)
    • HBM ESD classification level 1B
    • CDM ESD classification level C3
  • Drives two N-channel MOSFETs in high-side low-side configuration
  • 5-V typical under voltage lockout
  • Input interlock
  • Enable/disable functionality in DRC package
  • 16-ns typical propagation delay
  • 12-ns rise, 10-ns fall time with 1.8-nF load
  • 1-ns typical delay matching
  • Absolute Maximum Negative Voltage Handling on Inputs (–5 V)
  • Absolute Maximum Negative Voltage Handling on HS (–14 V)
  • ±3-A peak output current
  • Absolute maximum boot voltage 120 V
  • Low current (7-µA) consumption when disabled
  • Integrated bootstrap diode

The UCC27282 -Q1 is a robust N-channel MOSFET driver with a maximum switch node (HS) voltage rating of 100 V. It allows for two N-channel MOSFETs to be controlled in half-bridge or synchronous buck configuration based topologies. Its 3-A peak source and sink current along with low pull-up and pull-down resistance allows the UCC27282 -Q1 to drive large power MOSFETs with minimum switching losses during the transition of the MOSFET Miller plateau. Since the inputs are independent of the supply voltage, UCC27282 -Q1 can be used in conjunction with both analog and digital controllers.

The input pins as well as the HS pin are able to tolerate significant negative voltage, which improves system robustness. Input interlock further improves robustness and system reliability in high noise applications. The enable and disable functionality provides additional system flexibility by reducing power consumption by the driver and responds to fault events within the system. 5-V UVLO allows systems to operate at lower bias voltages, which is necessary in many high frequency applications and improves system efficiency in certain operating modes. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency.

Under voltage lockout (UVLO) is provided for both the high-side and low-side driver stages forcing the outputs low if the VDD voltage is below the specified threshold. An integrated bootstrap diode eliminates the need for an external discrete diode in many applications, which saves board space and reduces system cost. UCC27282 -Q1 is offered in a small package enabling high density designs.

The UCC27282 -Q1 is a robust N-channel MOSFET driver with a maximum switch node (HS) voltage rating of 100 V. It allows for two N-channel MOSFETs to be controlled in half-bridge or synchronous buck configuration based topologies. Its 3-A peak source and sink current along with low pull-up and pull-down resistance allows the UCC27282 -Q1 to drive large power MOSFETs with minimum switching losses during the transition of the MOSFET Miller plateau. Since the inputs are independent of the supply voltage, UCC27282 -Q1 can be used in conjunction with both analog and digital controllers.

The input pins as well as the HS pin are able to tolerate significant negative voltage, which improves system robustness. Input interlock further improves robustness and system reliability in high noise applications. The enable and disable functionality provides additional system flexibility by reducing power consumption by the driver and responds to fault events within the system. 5-V UVLO allows systems to operate at lower bias voltages, which is necessary in many high frequency applications and improves system efficiency in certain operating modes. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency.

Under voltage lockout (UVLO) is provided for both the high-side and low-side driver stages forcing the outputs low if the VDD voltage is below the specified threshold. An integrated bootstrap diode eliminates the need for an external discrete diode in many applications, which saves board space and reduces system cost. UCC27282 -Q1 is offered in a small package enabling high density designs.

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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCC27282EVM-335 — UCC27282 120-V, 3-A, 5-V UVLO high-side low-side gate driver evaluation module

UCC27282EVM-335 is designed for evaluating UCC27282DRC, which is a 120V half bridge gate driver with high source and sink peak current capability. This EVM could be served to evaluate the driver IC against its datasheet. The EVM can also be used as Driver IC component selection guide. The EVM can (...)
User guide: PDF
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Simulation model

UCC27282 PSpice Transient Model

SNVMBN3.ZIP (32 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Calculation tool

UCC272xx Schematic Review Template

SLURB12.ZIP (62 KB)
Package Pins Download
SO PowerPAD (DDA) 8 View options
SOIC (D) 8 View options
VSON (DRC) 10 View options

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