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Parameters

Bus voltage (Max) (V) 120 Power switch MOSFET Input VCC (Min) (V) 8 Input VCC (Max) (V) 16 Peak output current (A) 3.5 Rise time (ns) 12 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 8 Rating Catalog Number of channels (#) 2 Fall time (ns) 10 Prop delay (ns) 16 Iq (uA) 2 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) -10 Features Enable open-in-new Find other Half-bridge drivers

Package | Pins | Size

SOIC (D) 8 19 mm² 4.9 x 3.9 open-in-new Find other Half-bridge drivers

Features

  • Drives two N-channel MOSFETs in high-side low-side configuration
  • Enable/disable functionality in DRC package

  • Low current (7-µA) consumption when disabled

  • 16-ns typical propagation delay
  • 12-ns rise, 10-ns fall time with 1800-pF load (typical)
  • 1-ns typical delay matching
  • Integrated 100V bootstrap diode
  • 8-V typical undervoltage lockout
  • Absolute maximum negative voltage handling on inputs (–5 V)
  • Absolute maximum negative voltage handling on HS (–14 V)
  • 3.5-A sink, 2.5-A Source output currents
  • Absolute maximum boot voltage 120 V
  • Inputs are independent of each other and VDD
  • Under voltage lockout for both channels
  • Specified from –40°C to 140°C junction temperature

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Description

The UCC27289 is a robust N-channel MOSFET driver with a maximum switch node (HS) voltage rating of 100 V. It allows for two N-channel MOSFETs to be controlled in half-bridge or synchronous buck configuration based topologies. Its 3.5-A peak sink current and 2.5-A peak source current along with low pull-up and pull-down resistance allows the UCC27289 to drive large power MOSFETs with minimum switching losses during the transition of the MOSFET Miller plateau. Since the inputs are independent of the supply voltage, UCC27289 can be used in conjunction with both analog and digital controllers. Two inputs are completely independent of each other and thus two outputs can be overlapped by overlapping inputs, if needed. The enable and disable functionality provides additional system flexibility by reducing power consumption by the driver and responds to fault events within the system.

The input pins as well as the HS pin are able to tolerate significant negative voltage, which improves system robustness. Small propagation delay and delay matching specifications minimize the dead-time requirement which improves system efficiency.

Under voltage lockout (UVLO) is provided for both the high-side and low-side driver stages forcing the outputs low if the VDD voltage is below the specified threshold. An integrated bootstrap diode eliminates the need for an external discrete diode in many applications, which saves board space and reduces system cost. UCC27289 is offered in multiple packages to accommodate system requirements such as robustness in harsh environments and density in compact applications.

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NEW UCC27288 ACTIVE 2.5-A to 3.5-A 120-V half-bridge driver with 8-V UVLO and no internal bootstrap diode Removes internal bootstrap diode for greater flexibility

Technical documentation

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Type Title Date
* Data sheet UCC27289 2.5-A/3.5-A 120-V Half-Bridge Driver with 8-V UVLO and Negative Voltage Handling datasheet Dec. 04, 2020
Application note Understanding and comparing peak current capability of gate drivers Mar. 30, 2021
More literature Best practices for half-bridge gate drivers for HEV/EV Mar. 23, 2021
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse Sep. 19, 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime May 30, 2018
Technical article Boosting efficiency for your solar inverter designs May 24, 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage Apr. 17, 2018

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CAD/CAE symbols

Package Pins Download
SOIC (D) 8 View options
VSON (DRC) 10 View options

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