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DRV8350

AKTIV

3-phasiger intelligenter Gate-Treiber, max. 102 V

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Datenblatt

DRV8350

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Rating Catalog Architecture Gate driver Control interface 1xPWM, 3xPWM, 6xPWM Gate drive (A) 1 Vs (min) (V) 9 Vs ABS (max) (V) 102 Features Hardware Management I/F, SPI/I2C, Smart Gate Drive Operating temperature range (°C) -40 to 125
Rating Catalog Architecture Gate driver Control interface 1xPWM, 3xPWM, 6xPWM Gate drive (A) 1 Vs (min) (V) 9 Vs ABS (max) (V) 102 Features Hardware Management I/F, SPI/I2C, Smart Gate Drive Operating temperature range (°C) -40 to 125
WQFN (RTV) 32 25 mm² (5 mm × 5 mm)
  • 9 to 100-V, Triple half-bridge gate driver
    • Optional integrated buck regulator
    • Optional triple low-side current shunt amplifiers
  • Smart gate drive architecture
    • Adjustable slew rate control for EMI performance
    • VGS handshake and minimum dead-time insertion to prevent shoot-through
    • 50-mA to 1-A peak source current
    • 100-mA to 2-A peak sink current
    • dV/dt mitigation through strong pulldown
  • Integrated gate driver power supplies
    • High-side doubler charge pump For 100% PWM duty cycle control
    • Low-side linear regulator
  • Integrated LM5008A buck regulator
    • 6 to 95-V operating voltage range
    • 2.5 to 75-V, 350-mA output capability
  • Integrated triple current shunt amplifiers
    • Adjustable gain (5, 10, 20, 40 V/V)
    • Bidirectional or unidirectional support
  • 6x, 3x, 1x, and independent PWM modes
    • Supports 120° sensored operation
  • SPI or hardware interface available
  • Low-power sleep mode (20 µA at VVM = 48-V)
  • Integrated protection features
    • VM undervoltage lockout (UVLO)
    • Gate drive supply undervoltage (GDUV)
    • MOSFET VDS overcurrent protection (OCP)
    • MOSFET shoot-through prevention
    • Gate driver fault (GDF)
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indicator (nFAULT)
  • 9 to 100-V, Triple half-bridge gate driver
    • Optional integrated buck regulator
    • Optional triple low-side current shunt amplifiers
  • Smart gate drive architecture
    • Adjustable slew rate control for EMI performance
    • VGS handshake and minimum dead-time insertion to prevent shoot-through
    • 50-mA to 1-A peak source current
    • 100-mA to 2-A peak sink current
    • dV/dt mitigation through strong pulldown
  • Integrated gate driver power supplies
    • High-side doubler charge pump For 100% PWM duty cycle control
    • Low-side linear regulator
  • Integrated LM5008A buck regulator
    • 6 to 95-V operating voltage range
    • 2.5 to 75-V, 350-mA output capability
  • Integrated triple current shunt amplifiers
    • Adjustable gain (5, 10, 20, 40 V/V)
    • Bidirectional or unidirectional support
  • 6x, 3x, 1x, and independent PWM modes
    • Supports 120° sensored operation
  • SPI or hardware interface available
  • Low-power sleep mode (20 µA at VVM = 48-V)
  • Integrated protection features
    • VM undervoltage lockout (UVLO)
    • Gate drive supply undervoltage (GDUV)
    • MOSFET VDS overcurrent protection (OCP)
    • MOSFET shoot-through prevention
    • Gate driver fault (GDF)
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indicator (nFAULT)

The DRV835x family of devices are highly-integrated gate drivers for three-phase brushless DC (BLDC) motor applications. These applications include field-oriented control (FOC), sinusoidal current control, and trapezoidal current control of BLDC motors. The device variants provide optional integrated current shunt amplifiers to support different motor control schemes and a buck regulator to power the gate driver or external controller.

The DRV835x uses smart gate drive (SGD) architecture to decrease the number of external components that are typically necessary for MOSFET slew rate control and protection circuits. The SGD architecture also optimizes dead time to prevent shoot-through conditions, provides flexibility in decreasing electromagnetic interference (EMI) by MOSFET slew rate control, and protects against gate short circuit conditions through VGS monitors. A strong gate pulldown circuit helps prevent unwanted dV/dt parasitic gate turn on events

Various PWM control modes (6x, 3x, 1x, and independent) are supported for simple interfacing to the external controller. These modes can decrease the number of outputs required of the controller for the motor driver PWM control signals. This family of devices also includes 1x PWM mode for simple sensored trapezoidal control of a BLDC motor by using an internal block commutation table.

The DRV835x family of devices are highly-integrated gate drivers for three-phase brushless DC (BLDC) motor applications. These applications include field-oriented control (FOC), sinusoidal current control, and trapezoidal current control of BLDC motors. The device variants provide optional integrated current shunt amplifiers to support different motor control schemes and a buck regulator to power the gate driver or external controller.

The DRV835x uses smart gate drive (SGD) architecture to decrease the number of external components that are typically necessary for MOSFET slew rate control and protection circuits. The SGD architecture also optimizes dead time to prevent shoot-through conditions, provides flexibility in decreasing electromagnetic interference (EMI) by MOSFET slew rate control, and protects against gate short circuit conditions through VGS monitors. A strong gate pulldown circuit helps prevent unwanted dV/dt parasitic gate turn on events

Various PWM control modes (6x, 3x, 1x, and independent) are supported for simple interfacing to the external controller. These modes can decrease the number of outputs required of the controller for the motor driver PWM control signals. This family of devices also includes 1x PWM mode for simple sensored trapezoidal control of a BLDC motor by using an internal block commutation table.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt DRV835x 100-V Three-Phase Smart Gate Driver datasheet (Rev. A) PDF | HTML 24.06.2019
Application brief Brushless-DC Made Simple – Sensored Motor Control (Rev. C) PDF | HTML 11.03.2026
Application brief Understanding Gate Driver Slew Rate Control, MOSFET Switching Optimization and Protection Features (Rev. A) PDF | HTML 11.12.2025
Anwendungshinweis Relating Payload to Brushless DC Motor Driver Specifications PDF | HTML 02.12.2024
Zertifikat DRV8350S-EVM EU RoHS Declaration of Conformity (DoC) 03.10.2024
Anwendungshinweis Best Practices for Board Layout of Motor Drivers (Rev. B) PDF | HTML 14.10.2021
Anwendungshinweis Hardware Design Considerations for an Electric Bicycle using BLDC Motor (Rev. B) 23.06.2021
Anwendungshinweis System Design Considerations for High-Power Motor Driver Applications PDF | HTML 22.06.2021
Application brief MSP430 and DRV83xx Selection Guide for Power Tools (Rev. A) PDF | HTML 14.06.2021
Anwendungshinweis Understanding Smart Gate Drive (Rev. D) 01.03.2021
Technischer Artikel A basic brushless gate driver design – part 3: integrated vs. discrete half bridge PDF | HTML 16.12.2020
Technischer Artikel Anything but discrete: How to simplify 48-V to 60-V DC-fed three-phase inverter de PDF | HTML 01.02.2019
Application brief Low Voltage Motor Drive Operation With Smart Gate Drive 20.12.2018
Application brief DRV835x Split Supply Power Topology 26.09.2018
Application brief Field Oriented Control Made Easy for Brushless DC Motors Using Smart Gate Drive (Rev. B) 22.08.2018
Anwendungshinweis Architecture for Brushless-DC Gate Drive Systems (Rev. A) 22.08.2018
Anwendungshinweis Cut-Off Switch in High-Current Motor-Drive Applications (Rev. A) 20.08.2018
Benutzerhandbuch DRV8350x-EVM GUI User’s Guide 10.07.2017

Design und Entwicklung

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Evaluierungsplatine

DRV8350H-EVM — DRV8350H-Evaluierungsmodul für dreiphasigen Smart-Gate-Treiber

Das DRV8350H-EVM ist eine dreiphasige, bürstenlose DC-Antriebsstufe mit 15 A, die auf dem DRV8350H-Gate-Treiber für CSD19532Q5B-NexFET™-Power-Blocks basiert. 

Das Modul verfügt über individuelle DC-Bus- und Phasenspannungserfassung sowie einen externen, einzelnen Low-Side-Strom-Shunt-Verstärker, (...)

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Evaluierungsplatine

DRV8350S-EVM — DRV8350S-Evaluierungsmodul für dreiphasigen Smart-Gate-Treiber

Das DRV8350S-EVM ist eine dreiphasige, bürstenlose DC-Antriebsstufe mit 15 A, die auf dem DRV8350S-Gate-Treiber für CSD19532Q5B-NexFET™-Power-Blocks basiert. 

Das Modul verfügt über individuelle DC-Bus- und Phasenspannungserfassung sowie einen externen, einzelnen Low-Side-Strom-Shunt-Verstärker, (...)

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Berechnungstool

BLDC-MAX-QG-MOSFET-CALCULATOR — Calculate the maximum QG MOSFET for your motor driver

Calculate the maximum QG MOSFET that can be driven based on the PWM switching frequency, algorithm type, and additional external capacitance.
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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
WQFN (RTV) 32 Ultra Librarian
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